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Searched refs:InstrInfo (Results 1 – 25 of 145) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCoreSubtarget.h33 XCoreInstrInfo InstrInfo; variable
49 const XCoreInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
60 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCSubtarget.h33 ARCInstrInfo InstrInfo; variable
51 const ARCInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
59 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/llvm-project-15.0.7/llvm/utils/TableGen/GlobalISel/
H A DGIMatchTree.cpp403 if (!InstrInfo) { in repartition()
421 if (PDep->getRequiredMI() == InstrInfo->getInstrNode() && in repartition()
518 if (!InstrInfo) { in repartition()
569 GIMatchTreeInstrInfo *InstrInfo = Leaf.getInstrInfo(InstrID); in applyForPartition() local
571 if (!InstrInfo) in applyForPartition()
573 const GIMatchDagInstr *Instr = InstrInfo->getInstrNode(); in applyForPartition()
660 if (!InstrInfo) { in repartition()
670 if (E->getFromMI() != InstrInfo->getInstrNode() || in repartition()
699 if (!InstrInfo) in repartition()
734 GIMatchTreeInstrInfo *InstrInfo = Leaf.getInstrInfo(InstrID); in applyForPartition() local
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiSubtarget.h48 const LanaiInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
55 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
68 LanaiInstrInfo InstrInfo; variable
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVESubtarget.h42 VEInstrInfo InstrInfo; variable
51 const VEInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
56 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430Subtarget.h42 MSP430InstrInfo InstrInfo; variable
66 const MSP430InstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
68 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFSubtarget.h33 BPFInstrInfo InstrInfo; variable
76 const BPFInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
87 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXSubtarget.h42 NVPTXInstrInfo InstrInfo; variable
60 const NVPTXInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
62 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/llvm-project-15.0.7/llvm/lib/Target/SPIRV/
H A DSPIRVSubtarget.h43 SPIRVInstrInfo InstrInfo; variable
80 const SPIRVInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
88 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/
H A DClustering.cpp189 const MCSubtargetInfo &SubtargetInfo, const MCInstrInfo &InstrInfo) { in clusterizeNaive() argument
194 const unsigned NumOpcodes = InstrInfo.getNumOpcodes(); in clusterizeNaive()
202 ResolvedSchedClass::resolveSchedClassId(SubtargetInfo, InstrInfo, MCI); in clusterizeNaive()
334 const MCSubtargetInfo *SubtargetInfo, const MCInstrInfo *InstrInfo) { in create() argument
347 if (InstrInfo) in create()
348 Clustering.stabilize(InstrInfo->getNumOpcodes()); in create()
350 if (!SubtargetInfo || !InstrInfo) in create()
353 Clustering.clusterizeNaive(*SubtargetInfo, *InstrInfo); in create()
H A DSchedClassResolution.cpp220 const MCInstrInfo &InstrInfo, in ResolveVariantSchedClassId() argument
225 SchedClassId = STI.resolveVariantSchedClass(SchedClassId, &MCI, &InstrInfo, in ResolveVariantSchedClassId()
233 const MCInstrInfo &InstrInfo, in resolveSchedClassId() argument
235 unsigned SchedClassId = InstrInfo.get(MCI.getOpcode()).getSchedClass(); in resolveSchedClassId()
240 ResolveVariantSchedClassId(SubtargetInfo, InstrInfo, SchedClassId, MCI); in resolveSchedClassId()
H A DMCInstrDescView.cpp106 Instruction::create(const MCInstrInfo &InstrInfo, in create() argument
109 const llvm::MCInstrDesc *const Description = &InstrInfo.get(Opcode); in create()
187 Description, InstrInfo.getName(Opcode), std::move(Operands), in create()
304 InstructionsCache::InstructionsCache(const MCInstrInfo &InstrInfo, in InstructionsCache() argument
306 : InstrInfo(InstrInfo), RATC(RATC), BVC() {} in InstructionsCache()
311 Found = Instruction::create(InstrInfo, RATC, BVC, Opcode); in getInstr()
H A DMCInstrDescView.h111 create(const MCInstrInfo &InstrInfo, const RegisterAliasingTrackerCache &RATC,
176 InstructionsCache(const MCInstrInfo &InstrInfo,
183 const MCInstrInfo &InstrInfo;
H A DAnalysis.cpp156 std::unique_ptr<MCInstrInfo> InstrInfo, in Analysis() argument
162 InstrInfo_(std::move(InstrInfo)), in Analysis()
257 const MCInstrInfo &InstrInfo) { in writeParallelSnippetHtml() argument
260 writeEscaped<kEscapeHtml>(OS, InstrInfo.getName(Instructions[0].getOpcode())); in writeParallelSnippetHtml()
269 const MCInstrInfo &InstrInfo) { in writeLatencySnippetHtml() argument
276 writeEscaped<kEscapeHtml>(OS, InstrInfo.getName(Instr.getOpcode())); in writeLatencySnippetHtml()
H A DBenchmarkResult.cpp42 generateOpcodeNameToOpcodeIdxMapping(const MCInstrInfo &InstrInfo) { in generateOpcodeNameToOpcodeIdxMapping()
43 StringMap<unsigned> Map(InstrInfo.getNumOpcodes()); in generateOpcodeNameToOpcodeIdxMapping()
44 for (unsigned I = 0, E = InstrInfo.getNumOpcodes(); I < E; ++I) in generateOpcodeNameToOpcodeIdxMapping()
45 Map[InstrInfo.getName(I)] = I; in generateOpcodeNameToOpcodeIdxMapping()
46 assert(Map.size() == InstrInfo.getNumOpcodes() && "Size prediction failed"); in generateOpcodeNameToOpcodeIdxMapping()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcSubtarget.h55 SparcInstrInfo InstrInfo; variable
64 const SparcInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
69 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRSubtarget.h41 const AVRInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
52 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
135 AVRInstrInfo InstrInfo; variable
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DR600Subtarget.h32 R600InstrInfo InstrInfo;
50 const R600InstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
61 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kSubtarget.h65 M68kInstrInfo InstrInfo; variable
149 const M68kInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
156 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/llvm-project-15.0.7/llvm/lib/Target/DirectX/
H A DDirectXSubtarget.h33 DirectXInstrInfo InstrInfo; variable
51 const DirectXInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
/llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/X86/
H A DSnippetGeneratorTest.cpp42 InstrInfo(State.getInstrInfo()) {} in X86SnippetGeneratorTest()
54 const MCInstrInfo &InstrInfo; member in llvm::exegesis::__anon52bcd7af0111::X86SnippetGeneratorTest
73 EXPECT_THAT(InstrInfo.get(Opcode).getImplicitDefs()[0], X86::AX); in TEST_F()
74 EXPECT_THAT(InstrInfo.get(Opcode).getImplicitDefs()[1], X86::EFLAGS); in TEST_F()
75 EXPECT_THAT(InstrInfo.get(Opcode).getImplicitUses()[0], X86::AX); in TEST_F()
76 EXPECT_THAT(InstrInfo.get(Opcode).getImplicitUses()[1], X86::EFLAGS); in TEST_F()
99 EXPECT_THAT(InstrInfo.get(Opcode).getImplicitDefs()[0], X86::EFLAGS); in TEST_F()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZSubtarget.h81 SystemZInstrInfo InstrInfo; variable
113 const SystemZInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
115 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchSubtarget.h45 LoongArchInstrInfo InstrInfo; variable
69 const LoongArchInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblySubtarget.h57 WebAssemblyInstrInfo InstrInfo; variable
80 return &InstrInfo; in getInstrInfo()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsSubtarget.h222 std::unique_ptr<const MipsInstrInfo> InstrInfo; variable
385 const MipsInstrInfo *getInstrInfo() const override { return InstrInfo.get(); } in getInstrInfo()
390 return &InstrInfo->getRegisterInfo(); in getRegisterInfo()

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