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Searched refs:InVT1Size (Results 1 – 1 of 1) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp20283 uint64_t InVT1Size = InVT1.getFixedSizeInBits(); in createBuildVecShuffle() local
20286 assert(InVT2Size <= InVT1Size && in createBuildVecShuffle()
20292 if ((VTSize % InVT1Size == 0) && InVT1 == InVT2) { in createBuildVecShuffle()
20295 unsigned NumConcats = VTSize / InVT1Size; in createBuildVecShuffle()
20302 } else if (InVT1Size == VTSize * 2) { in createBuildVecShuffle()
20316 assert(InVT2Size <= InVT1Size && in createBuildVecShuffle()
20338 } else if (InVT2Size * 2 == VTSize && InVT1Size == VTSize) { in createBuildVecShuffle()