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Searched refs:ImmValue (Results 1 – 19 of 19) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonSplitConst32AndConst64.cpp78 uint64_t ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() local
81 .addImm(ImmValue); in runOnMachineFunction()
85 int64_t ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() local
90 int32_t LowWord = (ImmValue & 0xFFFFFFFF); in runOnMachineFunction()
91 int32_t HighWord = (ImmValue >> 32) & 0xFFFFFFFF; in runOnMachineFunction()
H A DHexagonHardwareLoops.cpp655 int64_t Mask = 0, ImmValue = 0; in getLoopTripCount() local
657 TII->analyzeCompare(*CondI, CmpReg1, CmpReg2, Mask, ImmValue); in getLoopTripCount()
H A DHexagonInstrInfo.cpp2175 int ImmValue = MO.getImm(); in isConstExtended() local
2177 return (ImmValue < MinValue || ImmValue > MaxValue); in isConstExtended()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsSEISelDAGToDAG.cpp553 APInt ImmValue; in selectVSplatCommon() local
560 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatCommon()
563 (!Signed && ImmValue.isIntN(ImmBitSize))) { in selectVSplatCommon()
629 APInt ImmValue; in selectVSplatUimmPow2() local
637 int32_t Log2 = ImmValue.exactLogBase2(); in selectVSplatUimmPow2()
660 APInt ImmValue; in selectVSplatMaskL() local
671 if (ImmValue == ~(~ImmValue & ~(~ImmValue + 1))) { in selectVSplatMaskL()
694 APInt ImmValue; in selectVSplatMaskR() local
704 if (ImmValue == (ImmValue & ~(ImmValue + 1))) { in selectVSplatMaskR()
716 APInt ImmValue; in selectVSplatUimmInvPow2() local
[all …]
H A DMicroMipsSizeReduction.cpp528 int64_t ImmValue; in ReduceADDIUToADDIUSP() local
529 if (!GetImm(MI, Entry.ImmField(), ImmValue)) in ReduceADDIUToADDIUSP()
532 if (!AddiuspImmValue(ImmValue)) in ReduceADDIUToADDIUSP()
/llvm-project-15.0.7/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2710 if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { in loadImmediate()
2714 ImmValue = SignExtend64<32>(ImmValue); in loadImmediate()
2769 if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { in loadImmediate()
4228 if (isRem && (ImmValue == 1 || (Signed && (ImmValue == -1)))) { in expandDivRem()
5063 else if ((ImmValue >= 1) && (ImmValue <= 32)) { in expandDRotationImm()
5094 if ((ImmValue >= 1) && (ImmValue <= 31)) { in expandDRotationImm()
5102 if ((ImmValue >= 33) && (ImmValue <= 63)) { in expandDRotationImm()
5108 if ((ImmValue >= 1) && (ImmValue <= 31)) { in expandDRotationImm()
5116 if ((ImmValue >= 33) && (ImmValue <= 63)) { in expandDRotationImm()
5494 if (ImmValue > -0x8000 && ImmValue < 0) { in expandSneI()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h362 uint16_t ImmValue; member
364 : SysAlias(N, E), ImmValue(I) {} in SysAliasImm()
366 : SysAlias(N, E, F), ImmValue(I) {} in SysAliasImm()
/llvm-project-15.0.7/llvm/lib/Object/
H A DMachOObjectFile.cpp3343 RebaseType = ImmValue; in moveNext()
3357 SegmentIndex = ImmValue; in moveNext()
3424 Count = ImmValue; in moveNext()
3425 if (ImmValue != 0) in moveNext()
3426 RemainingLoopCount = ImmValue - 1; in moveNext()
3700 Ordinal = ImmValue; in moveNext()
3702 if (ImmValue > O->getLibraryCount()) { in moveNext()
3757 if (ImmValue) { in moveNext()
3777 Flags = ImmValue; in moveNext()
3803 BindType = ImmValue; in moveNext()
[all …]
/llvm-project-15.0.7/bolt/include/bolt/Core/
H A DMCPlusBuilder.h125 int64_t ImmValue = AnnotationInst->getOperand(I).getImm(); variable
126 if (extractAnnotationIndex(ImmValue) == Index) {
142 int64_t ImmValue = AnnotationInst->getOperand(I).getImm(); in getAnnotationOpValue() local
143 if (extractAnnotationIndex(ImmValue) == Index) { in getAnnotationOpValue()
144 return extractAnnotationValue(ImmValue); in getAnnotationOpValue()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp590 int32_t ImmValue = RawImmValue; in expandSET() local
595 IsImm && ((is64Bit() ? 0 : -4096) <= ImmValue && ImmValue < 4096); in expandSET()
598 ValExpr = MCConstantExpr::create(ImmValue, getContext()); in expandSET()
628 if (!IsImm || IsEffectivelyImm13 || (ImmValue & 0x3ff)) { in expandSET()
/llvm-project-15.0.7/bolt/lib/Core/
H A DMCPlusBuilder.cpp284 int64_t ImmValue = AnnotationInst->getOperand(I).getImm(); in removeAnnotation() local
285 if (extractAnnotationIndex(ImmValue) == Index) { in removeAnnotation()
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.cpp206 unsigned SrcReg2, int64_t ImmValue, in isRedundantFlagInstr() argument
221 OI->getOperand(2).getImm() == ImmValue) in isRedundantFlagInstr()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrInfo.h654 Register SrcReg2, int64_t ImmMask, int64_t ImmValue,
H A DX86InstrInfo.cpp4013 int64_t ImmMask, int64_t ImmValue, in isRedundantFlagInstr() argument
4030 OIMask != ImmMask || OIValue != ImmValue) in isRedundantFlagInstr()
4067 if (OIValue == ImmValue) { in isRedundantFlagInstr()
4070 } else if (static_cast<uint64_t>(ImmValue) == in isRedundantFlagInstr()
4074 } else if (static_cast<uint64_t>(ImmValue) == in isRedundantFlagInstr()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp2012 uint64_t ImmValue = 0; in FoldOperand() local
2024 ImmValue = FPC->getValueAPF().bitcastToAPInt().getZExtValue(); in FoldOperand()
2034 ImmValue = Value; in FoldOperand()
2047 Imm = DAG.getTargetConstant(ImmValue, SDLoc(ParentNode), MVT::i32); in FoldOperand()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp2582 int32_t ImmValue = cast<ConstantSDNode>(N->getOperand(3))->getZExtValue(); in SelectMVE_WB() local
2583 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate offset in SelectMVE_WB()
2617 int32_t ImmValue = cast<ConstantSDNode>(N->getOperand(3))->getZExtValue(); in SelectMVE_LongShift() local
2618 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate shift count in SelectMVE_LongShift()
2680 int32_t ImmValue = cast<ConstantSDNode>(N->getOperand(3))->getZExtValue(); in SelectMVE_VSHLC() local
2681 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate shift count in SelectMVE_VSHLC()
2870 int ImmValue = cast<ConstantSDNode>(ImmOp)->getZExtValue(); in SelectMVE_VxDUP() local
2871 Ops.push_back(getI32Imm(ImmValue, Loc)); in SelectMVE_VxDUP()
H A DARMBaseInstrInfo.cpp2870 int64_t ImmValue, in isRedundantFlagInstr() argument
2895 OI->getOperand(2).getImm() == ImmValue) { in isRedundantFlagInstr()
2903 OI->getOperand(3).getImm() == ImmValue) { in isRedundantFlagInstr()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64SystemOperands.td102 let SearchableFields = ["Name", "Encoding", "ImmValue"];
107 bits<5> ImmValue = immValue;
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp5805 int64_t ImmValue = cast<ConstantSDNode>(Op.getOperand(2))->getSExtValue(); in lowerVECTOR_SPLICE() local
5807 if (ImmValue >= 0) { in lowerVECTOR_SPLICE()
5810 DownOffset = DAG.getConstant(ImmValue, DL, XLenVT); in lowerVECTOR_SPLICE()
5815 UpOffset = DAG.getConstant(-ImmValue, DL, XLenVT); in lowerVECTOR_SPLICE()