| /llvm-project-15.0.7/bolt/lib/Target/X86/ |
| H A D | X86MCSymbolizer.cpp | 27 bool IsBranch, uint64_t ImmOffset, uint64_t ImmSize, uint64_t InstSize) { in tryAddingSymbolicOperand() argument
112 if (!Relocation || Relocation->Offset != InstOffset + ImmOffset) in tryAddingSymbolicOperand()
113 Relocation = Function.getRelocationAt(InstOffset + ImmOffset); in tryAddingSymbolicOperand()
120 SymbolValue += InstAddress + ImmOffset; in tryAddingSymbolicOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCCodeEmitter.cpp | 138 ImmOffset = CDisp8 - Value; in isDispOrCDisp8()
241 emitConstant(DispOp.getImm() + ImmOffset, Size, OS); in emitImmediate()
254 assert(ImmOffset == 0); in emitImmediate()
286 ImmOffset -= 4; in emitImmediate()
294 ImmOffset -= 2; in emitImmediate()
296 ImmOffset -= 1; in emitImmediate()
298 if (ImmOffset) in emitImmediate()
521 int ImmOffset = 0; in emitMemModRMByte() local
525 ImmOffset); in emitMemModRMByte()
548 int ImmOffset = 0; in emitMemModRMByte() local
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 1436 ImmOffset = CurDAG->getTargetConstant(0, DL, MVT::i16); in SelectMUBUFScratchOffen()
1658 int64_t ImmOffset = 0; in SelectGlobalSAddr() local
1671 ImmOffset = COffsetVal; in SelectGlobalSAddr()
1812 SDValue VAddr, SDValue SAddr, uint64_t ImmOffset) const { in checkFlatScratchSVSSwizzleBug()
1822 KnownBits::makeConstant(APInt(32, ImmOffset))); in checkFlatScratchSVSSwizzleBug()
1831 int64_t ImmOffset = 0; in SelectScratchSVAddr() local
1840 ImmOffset = COffsetVal; in SelectScratchSVAddr()
1879 if (checkFlatScratchSVSSwizzleBug(VAddr, SAddr, ImmOffset)) in SelectScratchSVAddr()
2416 int ImmOffset = 0; in SelectDS_GWS() local
2432 ImmOffset = ConstOffset->getZExtValue(); in SelectDS_GWS()
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| H A D | AMDGPUInstructionSelector.h | 228 uint64_t ImmOffset) const;
272 Register &SOffset, int64_t &ImmOffset) const;
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| H A D | AMDGPUISelDAGToDAG.h | 172 SDValue &ImmOffset) const;
192 uint64_t ImmOffset) const;
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| H A D | AMDGPUInstructionSelector.cpp | 1414 unsigned ImmOffset; in selectDSGWSIntrinsic() local
1440 std::tie(BaseOffset, ImmOffset) = in selectDSGWSIntrinsic()
1479 MIB.addImm(ImmOffset) in selectDSGWSIntrinsic()
4018 int64_t ImmOffset = 0; in selectGlobalSAddr() local
4028 ImmOffset = ConstOffset; in selectGlobalSAddr()
4129 int64_t ImmOffset = 0; in selectScratchSAddr() local
4139 ImmOffset = ConstOffset; in selectScratchSAddr()
4205 int64_t ImmOffset = 0; in selectScratchSVAddr() local
4214 ImmOffset = ConstOffset; in selectScratchSVAddr()
4674 .addImm(ImmOffset); in splitIllegalMUBUFOffset()
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| H A D | AMDGPURegisterBankInfo.cpp | 1256 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
1261 InstOffsetVal = ImmOffset; in setBufferOffsets()
1275 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
1282 InstOffsetVal = ImmOffset; in setBufferOffsets()
1368 int64_t ImmOffset = 0; in applyMappingSBufferLoad() local
1806 unsigned ImmOffset; in splitBufferOffsets() local
1813 if (ImmOffset != 0) { in splitBufferOffsets()
1822 ImmOffset -= Overflow; in splitBufferOffsets()
1824 Overflow += ImmOffset; in splitBufferOffsets()
1825 ImmOffset = 0; in splitBufferOffsets()
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| H A D | AMDGPULegalizerInfo.cpp | 4253 unsigned ImmOffset; in splitBufferOffsets() local
4257 std::tie(BaseReg, ImmOffset) = in splitBufferOffsets()
4271 unsigned Overflow = ImmOffset & ~MaxImm; in splitBufferOffsets()
4272 ImmOffset -= Overflow; in splitBufferOffsets()
4274 Overflow += ImmOffset; in splitBufferOffsets()
4275 ImmOffset = 0; in splitBufferOffsets()
4290 return std::make_pair(BaseReg, ImmOffset); in splitBufferOffsets()
4422 unsigned ImmOffset; in legalizeBufferStore() local
4479 .addImm(ImmOffset); // offset(imm) in legalizeBufferStore()
4529 unsigned ImmOffset; in legalizeBufferLoad() local
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| H A D | AMDGPULegalizerInfo.h | 171 Register SOffset, unsigned ImmOffset, Register VIndex,
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| H A D | SIISelLowering.cpp | 8416 unsigned ImmOffset = C1->getZExtValue(); in splitBufferOffsets() local
8424 unsigned Overflow = ImmOffset & ~MaxImm; in splitBufferOffsets()
8425 ImmOffset -= Overflow; in splitBufferOffsets()
8427 Overflow += ImmOffset; in splitBufferOffsets()
8428 ImmOffset = 0; in splitBufferOffsets()
8457 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
8458 if (AMDGPU::splitMUBUFOffset(Imm, SOffset, ImmOffset, Subtarget, in setBufferOffsets()
8462 Offsets[2] = DAG.getTargetConstant(ImmOffset, DL, MVT::i32); in setBufferOffsets()
8469 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
8471 if (Offset >= 0 && AMDGPU::splitMUBUFOffset(Offset, SOffset, ImmOffset, in setBufferOffsets()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 854 const int64_t ImmOffset = MFI.getObjectOffset(SaveIndex); in emitPrologue() local
855 assert((ImmOffset <= -8 && ImmOffset >= -512) && in emitPrologue()
857 assert(((ImmOffset & 0x7) == 0) && in emitPrologue()
861 .addImm(ImmOffset) in emitPrologue()
1854 const int64_t ImmOffset = MFI.getObjectOffset(SaveIndex); in emitEpilogue() local
1855 assert((ImmOffset <= -8 && ImmOffset >= -512) && in emitEpilogue()
1857 assert(((ImmOffset & 0x7) == 0) && in emitEpilogue()
1861 .addImm(ImmOffset) in emitEpilogue()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 696 int ImmOffset = MI.getOperand(2).getImm() + Offset; in expandSVESpillFill() local
698 assert(ImmOffset >= -256 && ImmOffset < 256 && in expandSVESpillFill()
705 .addImm(ImmOffset); in expandSVESpillFill()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.h | 999 bool splitMUBUFOffset(uint32_t Imm, uint32_t &SOffset, uint32_t &ImmOffset,
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| H A D | AMDGPUBaseInfo.cpp | 2300 bool splitMUBUFOffset(uint32_t Imm, uint32_t &SOffset, uint32_t &ImmOffset, in splitMUBUFOffset() argument
2334 ImmOffset = Imm; in splitMUBUFOffset()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 4032 SDValue Base, RegOffset, ImmOffset; in Select() local
4035 SelectAddrMode3(Addr, Base, RegOffset, ImmOffset); in Select()
4044 SDValue Ops[] = {Base, RegOffset, ImmOffset, Chain}; in Select()
4061 SDValue Base, RegOffset, ImmOffset; in Select() local
4064 SelectAddrMode3(Addr, Base, RegOffset, ImmOffset); in Select()
4075 SDValue Ops[] = {SDValue(RegPair, 0), Base, RegOffset, ImmOffset, Chain}; in Select()
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