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Searched refs:ITSTATE (Results 1 – 7 of 7) sorted by relevance

/llvm-project-15.0.7/lldb/source/Plugins/Architecture/Arm/
H A DArchitectureArm.cpp111 const uint32_t ITSTATE = Bits32(cpsr, 15, 10) << 2 | Bits32(cpsr, 26, 25); in OverrideStopInfo() local
112 if (ITSTATE != 0) { in OverrideStopInfo()
113 const uint32_t condition = Bits32(ITSTATE, 7, 4); in OverrideStopInfo()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DThumb2ITBlockPass.cpp91 if (!Reg || Reg == ARM::ITSTATE || Reg == ARM::SP) in INITIALIZE_PASS()
218 MI->addOperand(MachineOperand::CreateReg(ARM::ITSTATE, false/*ifDef*/, in InsertITInstructions()
248 NMI->addOperand(MachineOperand::CreateReg(ARM::ITSTATE, false/*ifDef*/, in InsertITInstructions()
273 LastITMI->findRegisterUseOperand(ARM::ITSTATE)->setIsKill(); in InsertITInstructions()
H A DARMLowOverheadLoops.cpp558 RDA.getReachingLocalUses(&IT, MCRegister::from(ARM::ITSTATE), in INITIALIZE_PASS()
568 if (MachineOperand *MO = Dead->findRegisterUseOperand(ARM::ITSTATE)) { in INITIALIZE_PASS()
H A DARMRegisterInfo.td192 def ITSTATE : ARMReg<4, "itstate">;
H A DARMBaseInstrInfo.cpp6418 if (MI.readsRegister(ARM::ITSTATE, TRI) || in getOutliningType()
6419 MI.modifiesRegister(ARM::ITSTATE, TRI)) in getOutliningType()
H A DARMInstrThumb2.td3966 let Defs = [ITSTATE] in
/llvm-project-15.0.7/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.cpp2784 ITSTATE.IT<7:0> = firstcond:mask; in EmulateIT()