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Searched refs:ILP32 (Results 1 – 25 of 25) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dvararg.ll41 ; ILP32-ILP32F-FPELIM-LABEL: va1:
42 ; ILP32-ILP32F-FPELIM: # %bb.0:
56 ; ILP32-ILP32F-FPELIM-NEXT: ret
58 ; ILP32-ILP32F-WITHFP-LABEL: va1:
59 ; ILP32-ILP32F-WITHFP: # %bb.0:
81 ; ILP32-ILP32F-WITHFP-NEXT: ret
168 ; ILP32-ILP32F-FPELIM-NEXT: ret
189 ; ILP32-ILP32F-WITHFP-NEXT: ret
282 ; ILP32-ILP32F-FPELIM-NEXT: ret
492 ; ILP32-ILP32F-FPELIM-LABEL: va2:
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H A Dcallee-saved-fpr64s.ll20 ; ILP32-LABEL: callee:
21 ; ILP32: # %bb.0:
26 ; ILP32-NEXT: fld ft2, 16(a1)
27 ; ILP32-NEXT: fld ft3, 24(a1)
28 ; ILP32-NEXT: fld ft4, 32(a1)
29 ; ILP32-NEXT: fld ft5, 40(a1)
30 ; ILP32-NEXT: fld ft6, 48(a1)
88 ; ILP32-NEXT: ret
364 ; ILP32-LABEL: caller:
365 ; ILP32: # %bb.0:
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H A Dcallee-saved-fpr32s.ll24 ; ILP32-LABEL: callee:
25 ; ILP32: # %bb.0:
32 ; ILP32-NEXT: flw ft4, 16(a1)
33 ; ILP32-NEXT: flw ft5, 20(a1)
34 ; ILP32-NEXT: flw ft6, 24(a1)
35 ; ILP32-NEXT: flw ft7, 28(a1)
36 ; ILP32-NEXT: flw fa0, 32(a1)
92 ; ILP32-NEXT: ret
560 ; ILP32-LABEL: caller:
561 ; ILP32: # %bb.0:
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H A Dsubtarget-features-std-ext.ll2 ; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s
12 ; RV32IF-ILP32: fcvt.s.w ft0, a0
13 ; RV32IF-ILP32-NEXT: fmv.x.w a0, ft0
H A Dmodule-target-abi.ll4 ; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s
16 ; RV32IF-ILP32: # %bb.0:
17 ; RV32IF-ILP32: fmv.x.w a0, ft0
H A Dmodule-target-abi2.ll4 ; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s
9 ; RV32IF-ILP32: -target-abi option != target-abi module flag
H A Dtarget-abi-invalid.ll10 ; RUN: | FileCheck -check-prefix=RV64I-ILP32 %s
18 ; RV64I-ILP32: 32-bit ABIs are not supported for 64-bit targets (ignoring target-abi)
H A Dcalling-conv-rv32f-ilp32.ll5 ; Exercises the ILP32 calling convention code in the case that f32 is a legal
/llvm-project-15.0.7/lld/MachO/Arch/
H A DARM64_32.cpp70 ::writeStub<ILP32>(buf8, stubCode, sym); in writeStub()
83 ::writeStubHelperHeader<ILP32>(buf8, stubHelperHeaderCode); in writeStubHelperHeader()
97 ARM64_32::ARM64_32() : ARM64Common(ILP32()) { in ARM64_32()
H A DARM.cpp155 ARM::ARM(uint32_t cpuSubtype) : TargetInfo(ILP32()) { in ARM()
/llvm-project-15.0.7/llvm/test/tools/llvm-readobj/ELF/
H A Dloongarch-eflags.test54 # READELF-ILP32S: Flags: 0x5, ILP32, SOFT-FLOAT
55 # READELF-ILP32F: Flags: 0x6, ILP32, SINGLE-FLOAT
56 # READELF-ILP32D: Flags: 0x7, ILP32, DOUBLE-FLOAT
/llvm-project-15.0.7/llvm/test/MC/AArch64/
H A Darm64_32-compact-unwind.s4 ; The compact unwind format in ILP32 mode is pretty much the same, except
/llvm-project-15.0.7/llvm/test/MC/RISCV/
H A Dtarget-abi-invalid.s10 # RUN: | FileCheck -check-prefix=RV64I-ILP32 %s
18 # RV64I-ILP32: 32-bit ABIs are not supported for 64-bit targets (ignoring target-abi)
74 # RV32E-ILP32: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)
/llvm-project-15.0.7/lld/MachO/
H A DObjC.cpp55 return ::objectHasObjCSection<ILP32>(mb); in objectHasObjCSection()
H A DTarget.h149 struct ILP32 { struct
H A DInputFiles.cpp1052 parseLazy<ILP32>(); in ObjFile()
1057 parse<ILP32>(); in ObjFile()
2319 f.parse<ILP32>(); in extract()
H A DSyntheticSections.cpp865 : collectDataInCodeEntries<ILP32>(); in finalizeContents()
1757 template SymtabSection *macho::makeSymtabSection<ILP32>(StringTableSection &);
H A DWriter.cpp1245 template void macho::writeResult<ILP32>();
H A DDriver.cpp1690 writeResult<ILP32>(); in link()
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dmemchr-4.ll6 ; when LLVM is compiled in ILP32 mode).
H A Dstrncmp-3.ll6 ; when LLVM is compiled in ILP32 mode).
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DRelocation.txt70 The instantiation in Mips64InstrInfo.td is used for MIPS64 in ILP32
/llvm-project-15.0.7/llvm/docs/tutorial/MyFirstLanguageFrontend/
H A DLangImpl10.rst182 SSA-value came from a C "int" or a C "long" on an ILP32 machine (other
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.td260 // In the ILP32 world, the minimum stack slot size is 4 bytes. Otherwise the
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrInfo.td800 // Memory operands that use 64-bit pointers in both ILP32 and LP64.