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Searched refs:HiRHS (Results 1 – 4 of 4) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp3062 SDValue HiLHS, HiRHS; in LowerUMULO_SMULO() local
3065 HiRHS = DAG.getNode(ISD::SRA, dl, MVT::i64, RHS, ShiftAmt); in LowerUMULO_SMULO()
3068 HiRHS = DAG.getConstant(0, dl, MVT::i64); in LowerUMULO_SMULO()
3071 SDValue Args[] = { HiLHS, LHS, HiRHS, RHS }; in LowerUMULO_SMULO()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp1646 SDValue LoLHS, HiLHS, LoRHS, HiRHS; in SplitVecRes_OverflowOp() local
1649 GetSplitVector(N->getOperand(1), LoRHS, HiRHS); in SplitVecRes_OverflowOp()
1652 std::tie(LoRHS, HiRHS) = DAG.SplitVectorOperand(N, 1); in SplitVecRes_OverflowOp()
1659 SDNode *HiNode = DAG.getNode(Opcode, dl, HiVTs, HiLHS, HiRHS).getNode(); in SplitVecRes_OverflowOp()
H A DTargetLowering.cpp9365 SDValue HiRHS; in expandMULO() local
9374 HiRHS = in expandMULO()
9380 HiRHS = DAG.getConstant(0, dl, VT); in expandMULO()
9396 SDValue Args[] = { LHS, HiLHS, RHS, HiRHS }; in expandMULO()
9399 SDValue Args[] = { HiLHS, LHS, HiRHS, RHS }; in expandMULO()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp3021 SDValue HiRHS = DAG.getConstant(ValHi, SL, MVT::i32); in splitBinaryBitConstantOpImpl() local
3024 SDValue HiAnd = DAG.getNode(Opc, SL, MVT::i32, Hi, HiRHS); in splitBinaryBitConstantOpImpl()