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Searched refs:HasVSX (Results 1 – 10 of 10) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstrVSX.td1337 } // HasVSX, HasP8Vector
2441 // [HasVSX]
2442 // [HasVSX, IsBigEndian]
2444 // [HasVSX, NoP9Vector]
2449 // [HasVSX, HasP8Vector]
2463 // [HasVSX, HasP9Vector]
2902 } // HasVSX
3015 } // HasVSX, IsBigEndian
3173 } // HasVSX, NoP9Vector
3324 } // HasVSX, HasP8Vector
[all …]
H A DPPCSubtarget.cpp83 HasVSX = false; in initializeEnvironment()
189 if (HasSPE && (HasAltivec || HasVSX || HasFPU)) in initSubtargetFeatures()
H A DPPCSubtarget.h104 bool HasVSX; variable
280 bool hasVSX() const { return HasVSX; } in hasVSX()
H A DPPCInstrP10.td1822 let Predicates = [IsISA3_1, HasVSX] in {
1978 let Predicates = [IsISA3_1, HasVSX] in {
2008 let AddedComplexity = 400, Predicates = [IsISA3_1, HasVSX] in {
2232 let Predicates = [IsISA3_1, HasVSX, IsLittleEndian] in {
2266 let Predicates = [IsISA3_1, HasVSX, IsBigEndian, IsPPC32] in {
2279 let Predicates = [IsISA3_1, HasVSX, IsBigEndian, IsPPC64] in {
2303 let AddedComplexity = 400, Predicates = [IsISA3_1, HasVSX, IsBigEndian] in {
H A DPPC.td142 def FeatureVSX : SubtargetFeature<"vsx","HasVSX", "true",
H A DPPCISelDAGToDAG.cpp4187 bool HasVSX, bool &Swap, bool &Negate) { in getVCmpInst() argument
4215 return HasVSX ? PPC::XVCMPEQSP : PPC::VCMPEQFP; in getVCmpInst()
4222 return HasVSX ? PPC::XVCMPGTSP : PPC::VCMPGTFP; in getVCmpInst()
4229 return HasVSX ? PPC::XVCMPGESP : PPC::VCMPGEFP; in getVCmpInst()
H A DPPCInstrAltivec.td1314 // !HasVSX predicate. This essentially favours VSX over Altivec, in
H A DPPCISelLowering.cpp6813 bool HasVSX) { in getRegClassForSVT() argument
6827 return HasVSX ? &PPC::VSFRCRegClass : &PPC::F8RCRegClass; in getRegClassForSVT()
/llvm-project-15.0.7/clang/lib/Basic/Targets/
H A DPPC.cpp38 HasVSX = true; in handleTargetFeatures()
390 if (HasVSX) in getTargetDefines()
661 .Case("vsx", HasVSX) in hasFeature()
H A DPPC.h64 bool HasVSX = false; variable