[clang][AIX] Add option to control quadword lock free atomics ABI on AIX

We are supporting quadword lock free atomics on AIX. For the situation that users on AIX are using a libatomic that is lock-b

[clang][AIX] Add option to control quadword lock free atomics ABI on AIX

We are supporting quadword lock free atomics on AIX. For the situation that users on AIX are using a libatomic that is lock-based for quadword types, we can't enable quadword lock free atomics by default on AIX in case user's new code and existing code accessing the same shared atomic quadword variable, we can't guarentee atomicity. So we need an option to enable quadword lock free atomics on AIX, thus we can build a quadword lock-free libatomic(also for advanced users considering atomic performance critical) for users to make the transition smooth.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D127189

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[clang] Use llvm::is_contained (NFC)

[PowerPC] Implement XL compat __fnabs and __fnabss builtins.

This patch implements the following floating point negative absolute value
builtins that required for compatibility with the XL compiler:

[PowerPC] Implement XL compat __fnabs and __fnabss builtins.

This patch implements the following floating point negative absolute value
builtins that required for compatibility with the XL compiler:
```
double __fnabs(double);
float __fnabss(float);
```

These builtins will emit :
- fnabs on PWR6 and below, or if VSX is disabled.
- xsnabsdp on PWR7 and above, if VSX is enabled.

Differential Revision: https://reviews.llvm.org/D125506

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[PowerPC] Fix PPCISD::STBRX selection issue on A2

Enable FeatureISA2_06 on Power A2 target

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D125203

[PowerPC] Enable CR bits support for Power8 and above.

This patch turns on support for CR bit accesses for Power8 and above. The reason
why CR bits are turned on as the default for Power8 and above

[PowerPC] Enable CR bits support for Power8 and above.

This patch turns on support for CR bit accesses for Power8 and above. The reason
why CR bits are turned on as the default for Power8 and above is that because
later architectures make use of builtins and instructions that require CR bit
accesses (such as the use of setbc in the vector string isolate predicate
and bcd builtins on Power10).

This patch also adds the clang portion to allow for turning on CR bits in the
front end if the user so desires to.

Differential Revision: https://reviews.llvm.org/D124060

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[PowerPC] add XLC compat builtin __abs

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D123372

[PowerPC] Support 16-byte lock free atomics on pwr8 and up

Make 16-byte atomic type aligned to 16-byte on PPC64, thus consistent with GCC. Also enable inlining 16-byte atomics on non-AIX targets on

[PowerPC] Support 16-byte lock free atomics on pwr8 and up

Make 16-byte atomic type aligned to 16-byte on PPC64, thus consistent with GCC. Also enable inlining 16-byte atomics on non-AIX targets on PPC64.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D122377

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[Clang][PowerPC] Add max/min intrinsics to Clang and PPC backend

Add support for builtin_[max|min] which has below prototype:
A builtin_max (A1, A2, A3, ...)
All arguments must have the same type; t

[Clang][PowerPC] Add max/min intrinsics to Clang and PPC backend

Add support for builtin_[max|min] which has below prototype:
A builtin_max (A1, A2, A3, ...)
All arguments must have the same type; they must all be float, double, or long double.
Internally use SelectCC to get the result.

Reviewed By: qiucf

Differential Revision: https://reviews.llvm.org/D122478

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[PowerPC] Emit warning when SP is clobbered by asm

This patch emits a warning when the stack pointer register (`R1`) is found in
the clobber list of an inline asm statement. Clobbering the stack poi

[PowerPC] Emit warning when SP is clobbered by asm

This patch emits a warning when the stack pointer register (`R1`) is found in
the clobber list of an inline asm statement. Clobbering the stack pointer is
not supported.

Reviewed By: #powerpc, nemanjai

Differential Revision: https://reviews.llvm.org/D112073

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[PowerPC] Allow -mfloat128 option for VSX targets

Targets with VSX feature but without native float128 instructions can
also use that type with supplementary libcalls. We don't enable it by
default

[PowerPC] Allow -mfloat128 option for VSX targets

Targets with VSX feature but without native float128 instructions can
also use that type with supplementary libcalls. We don't enable it by
default now because Glibc assumes long double and float128 can be
implicitly converted in between, which is not available under default
'ibmlongdouble' semantics in clang.

This commit partly relands cbd93ce.

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Remove redundant return and continue statements (NFC)

Identified with readability-redundant-control-flow.

[PowerPC] Restrict various P10 options to P10 only.

This patch attempts to restrict the following P10 options:
```
-mprefixed
-mpcrel
-mpaired-vector-memops
```
To P10 only. This will prevent the us

[PowerPC] Restrict various P10 options to P10 only.

This patch attempts to restrict the following P10 options:
```
-mprefixed
-mpcrel
-mpaired-vector-memops
```
To P10 only. This will prevent the use of these options on P9 and earlier.

The behaviour of this patch looks like the following on pre-P10:
```
$ clang -mcpu=pwr9 -mpaired-vector-memops test.c -o test
error: option '-mpaired-vector-memops' cannot be specified without '-mcpu=pwr10'
$ clang -mcpu=pwr9 -mprefixed test.c -o test
error: option '-mprefixed' cannot be specified without '-mcpu=pwr10'
$ clang -mcpu=pwr9 -mprefixed -mpcrel test.c -o test
error: option '-mpcrel' cannot be specified without '-mcpu=pwr10 -mprefixed'
$ clang -mcpu=pwr9 -mpcrel -mprefixed test.c -o test
error: option '-mpcrel' cannot be specified without '-mcpu=pwr10 -mprefixed'
$ clang -mcpu=pwr9 -mpcrel test.c -o test
error: option '-mpcrel' cannot be specified without '-mcpu=pwr10 -mprefixed'
```

Differential Revision: https://reviews.llvm.org/D109652

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[Basic] Use llvm::is_contained (NFC)

[PowerPC] The builtins load8r and store8r are Power 7 plus.

This patch makes sure that the builtins __builtin_ppc_load8r and
__ builtin_ppc_store8r are only available for Power 7 and up.
Currently t

[PowerPC] The builtins load8r and store8r are Power 7 plus.

This patch makes sure that the builtins __builtin_ppc_load8r and
__ builtin_ppc_store8r are only available for Power 7 and up.
Currently the builtins seem to produce incorrect code if used for
Power 6 or before.

Reviewed By: nemanjai, #powerpc

Differential Revision: https://reviews.llvm.org/D110653

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[PowerPC] swdiv builtins for XL compatibility

This patch is in a series of patches to provide builtins for compatibility with
the XL compiler. This patch implements the software divide builtin as
wr

[PowerPC] swdiv builtins for XL compatibility

This patch is in a series of patches to provide builtins for compatibility with
the XL compiler. This patch implements the software divide builtin as
wrappers for a floating point divide. XL provided these builtins because it
didn't produce software estimates by default at `-Ofast`. When compiled
with `-Ofast` these builtins will produce the software estimate for divide.

Reviewed By: #powerpc, nemanjai

Differential Revision: https://reviews.llvm.org/D106959

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[PowerPC] Define XL-compatible macros only for AIX and Linux

Since XLC only ever shipped on PowerPC AIX and Linux, it is not reasonable to
provide the compatibility macros on any target other than t

[PowerPC] Define XL-compatible macros only for AIX and Linux

Since XLC only ever shipped on PowerPC AIX and Linux, it is not reasonable to
provide the compatibility macros on any target other than those two. This patch
restricts those macros to AIX/Linux.

Differential revision: https://reviews.llvm.org/D110213

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[PowerPC] FP compare and test XL compat builtins.

This patch is in a series of patches to provide builtins for
compatability with the XL compiler. This patch adds builtins for compare
exponent and t

[PowerPC] FP compare and test XL compat builtins.

This patch is in a series of patches to provide builtins for
compatability with the XL compiler. This patch adds builtins for compare
exponent and test data class operations on floating point values.

Reviewed By: #powerpc, lei

Differential Revision: https://reviews.llvm.org/D109437

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[AIX][PowerPC] Define __powerpc and __PPC macros

%%%
This patch defines the macros __powerpc and __PPC on AIX to be consistent with XL for AIX. See: https://www.ibm.com/docs/en/xl-c-and-cpp-aix/13.1

[AIX][PowerPC] Define __powerpc and __PPC macros

%%%
This patch defines the macros __powerpc and __PPC on AIX to be consistent with XL for AIX. See: https://www.ibm.com/docs/en/xl-c-and-cpp-aix/13.1.0?topic=macros-related-platform

Note: GCC does not currently define __powerpc and __PPC so users should prefer the __powerpc__ and __PPC__ forms.
%%%

Reviewed By: cebowleratibm

Differential Revision: https://reviews.llvm.org/D108917

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[PowerPC] Implement cmplxl builtins

This patch implements the builtins for cmplxl by utilising
__builtin_complex. This builtin is implemented to match XL
functionality.

Differential revision: https

[PowerPC] Implement cmplxl builtins

This patch implements the builtins for cmplxl by utilising
__builtin_complex. This builtin is implemented to match XL
functionality.

Differential revision: https://reviews.llvm.org/D107138

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[PowerPC] Implement XL compatibility builtin __addex

Add builtin and intrinsic for `__addex`.

This patch is part of a series of patches to provide builtins for
compatibility with the XL compiler.

[PowerPC] Implement XL compatibility builtin __addex

Add builtin and intrinsic for `__addex`.

This patch is part of a series of patches to provide builtins for
compatibility with the XL compiler.

Reviewed By: stefanp, nemanjai, NeHuang

Differential Revision: https://reviews.llvm.org/D107002

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[PowerPC] Do not define __PRIVILEGED__

We do not want to define __PRIVILEGED__. There is no use case for the
definition and gcc does not define it. This patch removes that definition.

Reviewed By:

[PowerPC] Do not define __PRIVILEGED__

We do not want to define __PRIVILEGED__. There is no use case for the
definition and gcc does not define it. This patch removes that definition.

Reviewed By: lei, NeHuang

Differential Revision: https://reviews.llvm.org/D107461

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[AIX] Define __HOS_AIX__ macro only for AIX target

%%%
This patch defines the macro __HOS_AIX__ when the target is AIX and without any dependency on the host. The macro indicates that the host is AI

[AIX] Define __HOS_AIX__ macro only for AIX target

%%%
This patch defines the macro __HOS_AIX__ when the target is AIX and without any dependency on the host. The macro indicates that the host is AIX. Defining the macro will help minimize porting pain for existing code compiled with xlc/xlC. xlC never shipped cross-compiling support, so the difference is not observable anyway.
%%%
This is a follow up to the discussion in https://reviews.llvm.org/D107242.

Reviewed By: cebowleratibm, joerg

Differential Revision: https://reviews.llvm.org/D107825

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[AIX] Define _ARCH_PPC64 macro for 32-bit

%%%
The macro _ARCH_PPC64 is already defined for 64-bit, but this patch defines it for 32-bit on AIX to follow xlc. See: https://www.ibm.com/docs/en/xl-c-an

[AIX] Define _ARCH_PPC64 macro for 32-bit

%%%
The macro _ARCH_PPC64 is already defined for 64-bit, but this patch defines it for 32-bit on AIX to follow xlc. See: https://www.ibm.com/docs/en/xl-c-and-cpp-aix/13.1.0?topic=features-macros-related-architecture-settings

Note: This change creates a discrepancy between GCC, which defines _ARCH_PPC64 only for 64-bit mode.

Tested with SPEC.
%%%

Reviewed By: cebowleratibm

Differential Revision: https://reviews.llvm.org/D107244

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[AIX] Define __HOS_AIX__ macro

%%%
This patch defines __HOS_AIX__ macro for AIX in case of a cross compiler implementation.
%%%
Tested with SPEC.

Reviewed By: cebowleratibm

Differential Revision:

[AIX] Define __HOS_AIX__ macro

%%%
This patch defines __HOS_AIX__ macro for AIX in case of a cross compiler implementation.
%%%
Tested with SPEC.

Reviewed By: cebowleratibm

Differential Revision: https://reviews.llvm.org/D107242

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[AIX] Define __THW_PPC__ macro

%%%
This patch defines the macro __THW_PPC__ for AIX.
%%%

Tested with SPEC.

Reviewed By: cebowleratibm

Differential Revision: https://reviews.llvm.org/D107243