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Searched refs:HasRC (Results 1 – 4 of 4) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp215 bool HasRC = InlineAsm::hasRegClassConstraint(Flag, RC); in tryInlineAsm() local
216 if ((!IsTiedToChangedOp && (!HasRC || RC != SP::IntRegsRegClassID)) in tryInlineAsm()
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp181 bool HasRC = InlineAsm::hasRegClassConstraint(Flag, RC); in selectInlineAsm() local
182 if ((!IsTiedToChangedOp && (!HasRC || RC != CSKY::GPRRegClassID)) || in selectInlineAsm()
/llvm-project-15.0.7/clang/lib/Sema/
H A DSemaChecking.cpp4561 bool HasRC = false; in CheckX86BuiltinRoundingOrSAE() local
4692 HasRC = true; in CheckX86BuiltinRoundingOrSAE()
4717 HasRC = true; in CheckX86BuiltinRoundingOrSAE()
4749 HasRC = true; in CheckX86BuiltinRoundingOrSAE()
4825 HasRC = true; in CheckX86BuiltinRoundingOrSAE()
4846 (!HasRC && Result == 12/*ROUND_CUR_DIRECTION|ROUND_NO_EXC*/) || in CheckX86BuiltinRoundingOrSAE()
4847 (HasRC && Result.getZExtValue() >= 8 && Result.getZExtValue() <= 11)) in CheckX86BuiltinRoundingOrSAE()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp5794 bool HasRC = InlineAsm::hasRegClassConstraint(Flag, RC); in tryInlineAsm() local
5795 if ((!IsTiedToChangedOp && (!HasRC || RC != ARM::GPRRegClassID)) in tryInlineAsm()