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Searched refs:GPRRC (Results 1 – 7 of 7) sorted by relevance

/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/RISCV/
H A Dreg-usage.ll26 ; CHECK-SCALAR-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 2 registers
29 ; CHECK-SCALAR-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 1 registers
31 ; CHECK-LMUL1-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 2 registers
36 ; CHECK-LMUL2-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 2 registers
41 ; CHECK-LMUL4-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 2 registers
46 ; CHECK-LMUL8-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 2 registers
H A Driscv-vector-reverse.ll101 ; CHECK-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 3 registers
105 ; CHECK-NEXT: LV: The target has 31 registers of RISCV::GPRRC register class
232 ; CHECK-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 3 registers
236 ; CHECK-NEXT: LV: The target has 31 registers of RISCV::GPRRC register class
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVTargetTransformInfo.h225 enum RISCVRegisterClass { GPRRC, FPRRC, VRRC }; enumerator
228 case RISCVRegisterClass::GPRRC: in getNumberOfRegisters()
250 return RISCVRegisterClass::GPRRC;
259 return RISCVRegisterClass::GPRRC;
264 case RISCVRegisterClass::GPRRC: in getRegisterClassName()
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/PowerPC/
H A Dreg-usage.ll135 ;CHECK-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 2 registers
138 ;CHECK-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 1 registers
175 ;CHECK-PWR8-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 2 registers
182 ;CHECK-PWR9-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 2 registers
185 ;CHECK-PWR9-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 1 registers
227 ;CHECK: LV(REG): RegisterClass: PPC::GPRRC, 2 registers
251 ;CHECK: LV(REG): RegisterClass: PPC::GPRRC, 4 registers
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.cpp846 assert(ClassID == GPRRC || ClassID == FPRRC || in getNumberOfRegisters()
849 assert(ClassID == GPRRC || ClassID == VSXRC || ClassID == VRRC); in getNumberOfRegisters()
852 assert(ClassID == GPRRC || ClassID == FPRRC || ClassID == VRRC); in getNumberOfRegisters()
868 return GPRRC; in getRegisterClassForType()
877 case GPRRC: return "PPC::GPRRC"; in getRegisterClassName()
H A DPPCTargetTransformInfo.h94 GPRRC, FPRRC, VRRC, VSXRC enumerator
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp3329 const TargetRegisterClass *GPRRC = in emitINSERT_DF_VIDX() local
3376 Register LaneTmp1 = RegInfo.createVirtualRegister(GPRRC); in emitINSERT_DF_VIDX()
3409 Register LaneTmp2 = RegInfo.createVirtualRegister(GPRRC); in emitINSERT_DF_VIDX()
3659 const TargetRegisterClass *GPRRC = in emitFPROUND_PSEUDO() local
3667 Register Rtemp = RegInfo.createVirtualRegister(GPRRC); in emitFPROUND_PSEUDO()
3673 Register Rtemp2 = RegInfo.createVirtualRegister(GPRRC); in emitFPROUND_PSEUDO()
3763 const TargetRegisterClass *GPRRC = in emitFPEXTEND_PSEUDO() local
3780 Register Rtemp = RegInfo.createVirtualRegister(GPRRC); in emitFPEXTEND_PSEUDO()
3788 Register Rtemp2 = RegInfo.createVirtualRegister(GPRRC); in emitFPEXTEND_PSEUDO()