Searched refs:FullDestReg (Results 1 – 2 of 2) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 6744 Register FullDestReg = MRI.createVirtualRegister(NewDestRC); in splitScalar64BitUnaryOp() local 6745 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg) in splitScalar64BitUnaryOp() 6751 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalar64BitUnaryOp() 6760 addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist); in splitScalar64BitUnaryOp() 6818 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg) in splitScalar64BitAddSub() 6824 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalar64BitAddSub() 6832 addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist); in splitScalar64BitAddSub() 6883 Register FullDestReg = MRI.createVirtualRegister(NewDestRC); in splitScalar64BitBinaryOp() local 6884 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg) in splitScalar64BitBinaryOp() 6890 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalar64BitBinaryOp() [all …]
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| H A D | SILoadStoreOptimizer.cpp | 1869 Register FullDestReg = MRI->createVirtualRegister(TRI->getVGPR64Class()); in computeBase() local 1871 BuildMI(*MBB, MBBI, DL, TII->get(TargetOpcode::REG_SEQUENCE), FullDestReg) in computeBase() 1879 return FullDestReg; in computeBase()
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