6744   Register FullDestReg = MRI.createVirtualRegister(NewDestRC);  in splitScalar64BitUnaryOp()  local
6745   BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg)  in splitScalar64BitUnaryOp()
6751   MRI.replaceRegWith(Dest.getReg(), FullDestReg);  in splitScalar64BitUnaryOp()
6760   addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist);  in splitScalar64BitUnaryOp()
6772   Register FullDestReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitAddSub()  local
6818   BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg)  in splitScalar64BitAddSub()
6824   MRI.replaceRegWith(Dest.getReg(), FullDestReg);  in splitScalar64BitAddSub()
6832   addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist);  in splitScalar64BitAddSub()
6883   Register FullDestReg = MRI.createVirtualRegister(NewDestRC);  in splitScalar64BitBinaryOp()  local
6884   BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg)  in splitScalar64BitBinaryOp()
6890   MRI.replaceRegWith(Dest.getReg(), FullDestReg);  in splitScalar64BitBinaryOp()
6896   addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist);  in splitScalar64BitBinaryOp()