| /llvm-project-15.0.7/clang/include/clang/Tooling/Refactoring/Rename/ |
| H A D | USRFindingAction.h | 45 ArrayRef<std::string> QualifiedNames, bool Force) in USRFindingAction() 47 ErrorOccurred(false), Force(Force) {} in USRFindingAction() 60 bool Force; member
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| /llvm-project-15.0.7/llvm/test/Other/ |
| H A D | module-pass-printer.ll | 24 ; FOO: IR Dump After {{Force set function attributes|ForceFunctionAttrsPass}} 27 ; FOO-NOT: IR Dump After {{Force set function attributes|ForceFunctionAttrsPass}} 29 ; BOTH: IR Dump After {{Force set function attributes|ForceFunctionAttrsPass}} 32 ; BOTH-NOT: IR Dump After {{Force set function attributes|ForceFunctionAttrsPass}} 35 ; EMPTY-NOT: IR Dump After {{Force set function attributes|ForceFunctionAttrsPass}} 38 ; ALL: IR Dump After {{Force set function attributes|ForceFunctionAttrsPass}} 42 ; ALL-NOT: IR Dump After {{Force set function attributes|ForceFunctionAttrsPass}}
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| /llvm-project-15.0.7/clang/lib/Tooling/Refactoring/Rename/ |
| H A D | USRFindingAction.cpp | 229 bool Force, bool &ErrorOccurred) in NamedDeclFindingConsumer() argument 231 SpellingNames(SpellingNames), USRList(USRList), Force(Force), in NamedDeclFindingConsumer() 267 if (Force) { in FindSymbol() 303 bool Force; member in clang::tooling::NamedDeclFindingConsumer 309 SymbolOffsets, QualifiedNames, SpellingNames, USRList, Force, in newASTConsumer()
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | multi-dword-vgpr-spill.ll | 23 ; Force %a to spill. 51 ; Force %a to spill. 81 ; Force %a to spill. 111 ; Force %a to spill. 143 ; Force %a to spill. 175 ; Force %a to spill. 208 ; Force %a to spill. 241 ; Force %a to spill.
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| H A D | spill-offset-calculation.ll | 21 ; Force %a to spill. 46 ; Force %a to spill 105 ; Force %a to spill with no free SGPRs 156 ; Force %a to spill with no free SGPRs 178 ; Force %a to spill. 210 ; Force %a to spill. 238 ; Force %a to spill. 263 ; Force %a to spill 293 ; Force %a to spill. 324 ; Force %a to spill.
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| H A D | amdpal-msgpack-es.ll | 13 ; Force MsgPack format metadata
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| H A D | amdpal-msgpack-ls.ll | 13 ; Force MsgPack format metadata
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| H A D | amdpal-msgpack-hs.ll | 14 ; Force MsgPack format metadata
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| H A D | amdpal-msgpack-gs.ll | 14 ; Force MsgPack format metadata
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| H A D | amdpal-msgpack-vs.ll | 14 ; Force MsgPack format metadata
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| H A D | amdpal-msgpack-cs.ll | 14 ; Force MsgPack format metadata
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | avx2-logic.ll | 20 ; Force the execution domain with an add. 42 ; Force the execution domain with an add. 63 ; Force the execution domain with an add. 84 ; Force the execution domain with an add.
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| H A D | regalloc-tight-invoke.ll | 25 %mem = alloca i32, i32 %a, align 32 ; Force rbx to be used as a base pointer 42 %mem = alloca i32, i32 %a, align 32 ; Force rbx to be used as a base pointer
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| /llvm-project-15.0.7/llvm/include/llvm/Transforms/Vectorize/ |
| H A D | LoopVectorizationLegality.h | 90 Hint Force; variable 155 if ((ForceKind)Force.Value == FK_Undefined && in getForce() 158 return (ForceKind)Force.Value; in getForce()
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| /llvm-project-15.0.7/llvm/tools/llvm-as/ |
| H A D | llvm-as.cpp | 43 static cl::opt<bool> Force("f", cl::desc("Enable binary output on terminals"), variable 90 if (Force || !CheckBitcodeOutputToConsole(Out->os())) { in WriteOutputFile()
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| /llvm-project-15.0.7/llvm/test/DebugInfo/MIR/X86/ |
| H A D | dvl-livedebugvars-movements.mir | 4 # with the correct operands and exprs. Force values to be moved around between 97 ; Force allocation into $rax and $rbx 100 ; Force a use of these two registers.
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| /llvm-project-15.0.7/llvm/test/MC/PowerPC/ |
| H A D | ppc64-reloc-directive-pcrel.s | 329 .space 60 # Force the pld to require an alignment nop. 350 .space 60 # Force the pld to require an alignment nop. 368 .space 60 # Force the pld to require an alignment nop. 388 .space 60 # Force the pld to require an alignment nop.
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| /llvm-project-15.0.7/llvm/test/MC/Mips/ |
| H A D | micromips-jump-pc-region.s | 6 # Force us into the second 256 MB region with a non-zero instruction index
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| H A D | mips-jump-pc-region.s | 8 # Force us into the second 256 MB region with a non-zero instruction index
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| /llvm-project-15.0.7/llvm/test/MC/MachO/ |
| H A D | empty-twice.ll | 5 ; Force the creation of a DWARF section
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| /llvm-project-15.0.7/clang/tools/clang-rename/ |
| H A D | ClangRename.cpp | 96 static cl::opt<bool> Force("force", variable 167 tooling::USRFindingAction FindingAction(SymbolOffsets, QualifiedNames, Force); in main()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrInfo.td | 17 // Force dependencies for vector trunc stores
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| /llvm-project-15.0.7/llvm/test/MC/WebAssembly/ |
| H A D | compile-twice.ll | 5 ; Force the creation of a DWARF section
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | fast-isel-branch-cond-mask.ll | 10 ; Force fast-isel to fall back to SDAG.
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| H A D | mlicm-stack-write-check.mir | 31 %0 = COPY $x0 ; Force isSSA = false.
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