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Searched refs:FirstMI (Results 1 – 23 of 23) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp28 if (FirstMI == nullptr) in isArithmeticBccPair()
79 if (FirstMI == nullptr) in isArithmeticCbzPair()
127 return FirstMI == nullptr || FirstMI->getOpcode() == AArch64::AESErr; in isAESPair()
131 return FirstMI == nullptr || FirstMI->getOpcode() == AArch64::AESDrr; in isAESPair()
144 if (FirstMI == nullptr) in isCryptoEORPair()
163 if ((FirstMI == nullptr || FirstMI->getOpcode() == AArch64::ADRP) && in isAdrpAddPair()
174 if ((FirstMI == nullptr || FirstMI->getOpcode() == AArch64::MOVZWi) && in isLiteralsPair()
180 if((FirstMI == nullptr || FirstMI->getOpcode() == AArch64::MOVZXi) && in isLiteralsPair()
224 if (FirstMI == nullptr) in isAddressLdStPair()
244 if (FirstMI == nullptr) in isCCSelectPair()
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H A DAArch64LoadStoreOptimizer.cpp561 unsigned OpcA = FirstMI.getOpcode(); in isPreLdStPairCandidate()
1288 assert(!FirstMI.hasOrderedMemoryRef() && in areCandidatesToMergeOrPair()
1289 !TII->isLdStPairSuppressed(FirstMI) && in areCandidatesToMergeOrPair()
1292 unsigned OpcA = FirstMI.getOpcode(); in areCandidatesToMergeOrPair()
1323 if (isPreLdStPairCandidate(FirstMI, MI)) in areCandidatesToMergeOrPair()
1337 if (!FirstMI.mayStore()) in canRenameUpToDef()
1349 if (!getLdStRegOp(FirstMI).isKill() && in canRenameUpToDef()
1350 !any_of(FirstMI.operands(), in canRenameUpToDef()
1514 MachineInstr &FirstMI = *I; in findMatchingInsn() local
1517 bool MayLoad = FirstMI.mayLoad(); in findMatchingInsn()
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/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp151 return (matchingImmOps(FirstMI, 2, 3) && matchingImmOps(FirstMI, 3, 60)) || in checkOpConstraints()
152 (matchingImmOps(FirstMI, 2, 6) && matchingImmOps(FirstMI, 3, 57)); in checkOpConstraints()
156 return matchingImmOps(FirstMI, 2, 1) && matchingImmOps(FirstMI, 3, 0); in checkOpConstraints()
160 return matchingImmOps(FirstMI, 2, 1) && matchingImmOps(FirstMI, 3, 63); in checkOpConstraints()
193 return (FirstMI.getOpcode() != PPC::MTSPR && in checkOpConstraints()
194 FirstMI.getOpcode() != PPC::MTSPR8) || in checkOpConstraints()
195 matchingImmOps(FirstMI, 0, 9); in checkOpConstraints()
200 return (FirstMI.getOpcode() != PPC::MTSPR && in checkOpConstraints()
202 matchingImmOps(FirstMI, 0, 8); in checkOpConstraints()
262 if (!FirstMI) in shouldScheduleAdjacent()
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/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DGCNCreateVOPD.cpp62 auto *FirstMI = Pair.first; in doReplace() local
64 unsigned Opc1 = FirstMI->getOpcode(); in doReplace()
71 auto VOPDInst = BuildMI(*FirstMI->getParent(), FirstMI, in doReplace()
74 VOPDInst.add(FirstMI->getOperand(0)) in doReplace()
76 .add(FirstMI->getOperand(1)); in doReplace()
106 VOPDInst.copyImplicitOps(*FirstMI); in doReplace()
111 FirstMI->eraseFromParent(); in doReplace()
133 auto *FirstMI = &*MII; in runOnMachineFunction() local
137 if (FirstMI->isDebugInstr()) in runOnMachineFunction()
147 Pair = {FirstMI, SecondMI}; in runOnMachineFunction()
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H A DGCNVOPDUtils.cpp37 const MachineInstr &FirstMI, in checkVOPDRegConstraints() argument
39 const MachineFunction *MF = FirstMI.getMF(); in checkVOPDRegConstraints()
55 for (auto MII = MachineBasicBlock::const_iterator(&FirstMI); in checkVOPDRegConstraints()
56 MII != FirstMI.getParent()->instr_end(); ++MII) { in checkVOPDRegConstraints()
64 if (Use.isReg() && FirstMI.modifiesRegister(Use.getReg())) in checkVOPDRegConstraints()
72 ComponentInfo CInfo[] = {ComponentInfo(FirstMI), ComponentInfo(SecondMI)}; in checkVOPDRegConstraints()
138 LLVM_DEBUG(dbgs() << "VOPD Reg Constraints Passed\n\tX: " << FirstMI in checkVOPDRegConstraints()
148 const MachineInstr *FirstMI, in shouldScheduleVOPDAdjacent() argument
155 if (!FirstMI) in shouldScheduleVOPDAdjacent()
158 unsigned Opc = FirstMI->getOpcode(); in shouldScheduleVOPDAdjacent()
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H A DAMDGPUMacroFusion.cpp28 const MachineInstr *FirstMI, in shouldScheduleAdjacent() argument
40 if (!FirstMI) in shouldScheduleAdjacent()
43 const MachineBasicBlock &MBB = *FirstMI->getParent(); in shouldScheduleAdjacent()
48 return FirstMI->definesRegister(Src2->getReg(), TRI); in shouldScheduleAdjacent()
H A DSILowerControlFlow.cpp727 MachineInstr *FirstMI = &*MBB->begin(); in lowerInitExec() local
732 if (DefInstr != FirstMI) { in lowerInitExec()
736 MBB->insert(FirstMI, DefInstr); in lowerInitExec()
741 FirstMI = &*std::next(FirstMI->getIterator()); in lowerInitExec()
751 auto BfeMI = BuildMI(*MBB, FirstMI, DL, TII->get(AMDGPU::S_BFE_U32), CountReg) in lowerInitExec()
757 BuildMI(*MBB, FirstMI, DL, in lowerInitExec()
761 auto CmpMI = BuildMI(*MBB, FirstMI, DL, TII->get(AMDGPU::S_CMP_EQ_U32)) in lowerInitExec()
767 BuildMI(*MBB, FirstMI, DL, in lowerInitExec()
H A DGCNVOPDUtils.h25 const MachineInstr &FirstMI,
H A DSIInstrInfo.cpp673 MachineInstr *FirstMI = nullptr, *LastMI = nullptr; in expandSGPRCopy() local
696 if (!FirstMI) in expandSGPRCopy()
697 FirstMI = LastMI; in expandSGPRCopy()
703 assert(FirstMI && LastMI); in expandSGPRCopy()
705 std::swap(FirstMI, LastMI); in expandSGPRCopy()
707 FirstMI->addOperand( in expandSGPRCopy()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMMacroFusion.cpp22 static bool isAESPair(const MachineInstr *FirstMI, in isAESPair() argument
28 return FirstMI == nullptr || FirstMI->getOpcode() == ARM::AESE; in isAESPair()
31 return FirstMI == nullptr || FirstMI->getOpcode() == ARM::AESD; in isAESPair()
38 static bool isLiteralsPair(const MachineInstr *FirstMI, in isLiteralsPair() argument
41 if ((FirstMI == nullptr || FirstMI->getOpcode() == ARM::MOVi16) && in isLiteralsPair()
53 const MachineInstr *FirstMI, in shouldScheduleAdjacent() argument
57 if (ST.hasFuseAES() && isAESPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()
59 if (ST.hasFuseLiterals() && isLiteralsPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()
H A DARMLoadStoreOptimizer.cpp1005 const MachineInstr *FirstMI = MemOps[0].MI; in FormCandidates() local
1006 unsigned Opcode = FirstMI->getOpcode(); in FormCandidates()
1008 unsigned Size = getLSMultipleTransferSize(FirstMI); in FormCandidates()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVMacroFusion.cpp25 static bool isLUIADDI(const MachineInstr *FirstMI, in isLUIADDI() argument
32 if (!FirstMI) in isLUIADDI()
35 if (FirstMI->getOpcode() != RISCV::LUI) in isLUIADDI()
42 Register FirstDest = FirstMI->getOperand(0).getReg(); in isLUIADDI()
55 const MachineInstr *FirstMI, in shouldScheduleAdjacent() argument
59 if (ST.hasLUIADDIFusion() && isLUIADDI(FirstMI, SecondMI)) in shouldScheduleAdjacent()
H A DRISCVMakeCompressible.cpp223 static Register analyzeCompressibleUses(MachineInstr &FirstMI, in analyzeCompressibleUses() argument
226 MachineBasicBlock &MBB = *FirstMI.getParent(); in analyzeCompressibleUses()
233 for (MachineBasicBlock::instr_iterator I = FirstMI.getIterator(), in analyzeCompressibleUses()
281 return RS.scavengeRegisterBackwards(*RCToScavenge, FirstMI.getIterator(), in analyzeCompressibleUses()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DMachineInstrBundle.cpp110 static DebugLoc getDebugLoc(MachineBasicBlock::instr_iterator FirstMI, in getDebugLoc() argument
112 for (auto MII = FirstMI; MII != LastMI; ++MII) in getDebugLoc()
125 MachineBasicBlock::instr_iterator FirstMI, in finalizeBundle() argument
127 assert(FirstMI != LastMI && "Empty bundle?"); in finalizeBundle()
128 MIBundleBuilder Bundle(MBB, FirstMI, LastMI); in finalizeBundle()
135 BuildMI(MF, getDebugLoc(FirstMI, LastMI), TII->get(TargetOpcode::BUNDLE)); in finalizeBundle()
147 for (auto MII = FirstMI; MII != LastMI; ++MII) { in finalizeBundle()
234 for (auto MII = FirstMI; MII != LastMI; ++MII) { in finalizeBundle()
249 MachineBasicBlock::instr_iterator FirstMI) { in finalizeBundle() argument
251 MachineBasicBlock::instr_iterator LastMI = std::next(FirstMI); in finalizeBundle()
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H A DXRayInstrumentation.cpp209 auto &FirstMI = *FirstMBB.begin(); in runOnMachineFunction() local
212 FirstMI.emitError("An attempt to perform XRay instrumentation for an" in runOnMachineFunction()
220 BuildMI(FirstMBB, FirstMI, FirstMI.getDebugLoc(), in runOnMachineFunction()
H A DVirtRegMap.cpp460 MachineInstr *FirstMI = MIs.back(); in expandCopyBundle() local
490 MachineInstr *BundleStart = FirstMI; in expandCopyBundle()
503 if (Indexes && BundledMI != FirstMI) in expandCopyBundle()
H A DModuloSchedule.cpp1290 MachineInstr *FirstMI = nullptr; in rewrite() local
1297 if (!FirstMI) in rewrite()
1298 FirstMI = MI; in rewrite()
1300 assert(FirstMI && "Failed to find first MI in schedule"); in rewrite()
1304 for (auto I = BB->getFirstNonPHI(); I != FirstMI->getIterator();) { in rewrite()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86MacroFusion.cpp37 const MachineInstr *FirstMI, in shouldScheduleAdjacent() argument
50 if (FirstMI == nullptr) in shouldScheduleAdjacent()
53 const X86::FirstMacroFusionInstKind TestKind = classifyFirst(*FirstMI); in shouldScheduleAdjacent()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonStoreWidening.cpp314 MachineInstr *FirstMI = *Begin; in selectStores() local
315 assert(!FirstMI->memoperands_empty() && "Expecting some memory operands"); in selectStores()
316 const MachineMemOperand &FirstMMO = getStoreTarget(FirstMI); in selectStores()
319 unsigned FirstOffset = getStoreOffset(FirstMI); in selectStores()
340 OG.push_back(FirstMI); in selectStores()
341 MachineInstr *S1 = FirstMI; in selectStores()
H A DHexagonVLIWPacketizer.cpp1818 MachineBasicBlock::instr_iterator FirstMI(OldPacketMIs.front()); in endPacket() local
1820 finalizeBundle(*MBB, FirstMI, LastMI); in endPacket()
1821 auto BundleMII = std::prev(FirstMI); in endPacket()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineInstrBundle.h28 MachineBasicBlock::instr_iterator FirstMI,
37 MachineBasicBlock::instr_iterator FirstMI);
H A DMacroFusion.h34 const MachineInstr *FirstMI,
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp7546 MachineInstr *FirstMI = Selects.front(); in createPHIsForSelects() local
7547 unsigned CCValid = FirstMI->getOperand(3).getImm(); in createPHIsForSelects()
7548 unsigned CCMask = FirstMI->getOperand(4).getImm(); in createPHIsForSelects()