Searched refs:FPZero (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/unittests/CodeGen/GlobalISel/ |
| H A D | PatternMatchTest.cpp | 666 Register FPZero = B.buildFConstant(s64, 0.0).getReg(0); in TEST_F() local
674 EXPECT_TRUE(mi_match(FPZero, *MRI, GFCstOrSplatGFCstMatch(FValReg))); in TEST_F()
675 EXPECT_EQ(FPZero, FValReg->VReg); in TEST_F()
679 auto ZeroSplat = B.buildBuildVector(v4s64, {FPZero, FPZero, FPZero, FPZero}); in TEST_F()
682 EXPECT_EQ(FPZero, FValReg->VReg); in TEST_F()
684 auto ZeroUndef = B.buildBuildVector(v4s64, {FPZero, FPZero, FPZero, Undef}); in TEST_F()
687 EXPECT_EQ(FPZero, FValReg->VReg); in TEST_F()
694 auto ZeroOne = B.buildBuildVector(v4s64, {FPZero, FPZero, FPZero, FPOne}); in TEST_F()
703 auto Mixed = B.buildBuildVector(v4s64, {FPZero, FPZero, FPZero, Copies[0]}); in TEST_F()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 6643 SDValue FPZero = DAG.getConstantFP(0.0, DL, VT); in getSqrtInputTest() local
6657 return DAG.getSetCC(DL, CCVT, Op, FPZero, ISD::SETEQ); in getSqrtInputTest()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 8856 SDValue FPZero = DAG.getConstantFP(0.0, DL, VT); in getSqrtInputTest() local
8857 return DAG.getSetCC(DL, CCVT, Op, FPZero, ISD::SETEQ); in getSqrtInputTest()
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