| /llvm-project-15.0.7/llvm/unittests/Analysis/ |
| H A D | FunctionPropertiesAnalysisTest.cpp | 161 FPU.finish(FAM); in TEST_F() 215 FPU.finish(FAM); in TEST_F() 282 FPU.finish(FAM); in TEST_F() 327 FPU.finish(FAM); in TEST_F() 381 FPU.finish(FAM); in TEST_F() 436 FPU.finish(FAM); in TEST_F() 489 FPU.finish(FAM); in TEST_F() 546 FPU.finish(FAM); in TEST_F() 618 FPU.finish(FAM); in TEST_F() 685 FPU.finish(FAM); in TEST_F() [all …]
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| /llvm-project-15.0.7/clang/lib/Basic/Targets/ |
| H A D | AArch64.cpp | 320 if (FPU & SveMode) in getTargetDefines() 323 if ((FPU & NeonMode) && (FPU & SveMode)) in getTargetDefines() 493 if (FPU & SveMode) in getTargetDefines() 529 FPU = FPUMode; in handleTargetFeatures() 561 FPU |= SveMode; in handleTargetFeatures() 565 FPU |= SveMode; in handleTargetFeatures() 570 FPU |= SveMode; in handleTargetFeatures() 576 FPU |= SveMode; in handleTargetFeatures() 582 FPU |= SveMode; in handleTargetFeatures() 588 FPU |= SveMode; in handleTargetFeatures() [all …]
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| H A D | ARM.cpp | 480 FPU = 0; in handleTargetFeatures() 506 FPU |= VFP2FPU; in handleTargetFeatures() 512 FPU |= VFP3FPU; in handleTargetFeatures() 518 FPU |= VFP4FPU; in handleTargetFeatures() 524 FPU |= FPARMV8; in handleTargetFeatures() 529 FPU |= NeonFPU; in handleTargetFeatures() 564 FPU |= FPARMV8; in handleTargetFeatures() 840 if (FPU & VFP2FPU) in getTargetDefines() 842 if (FPU & VFP3FPU) in getTargetDefines() 844 if (FPU & VFP4FPU) in getTargetDefines() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZScheduleZ196.td | 83 def : WriteRes<FPU, [Z196_FPUnit]>; 88 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [Z196_FPUnit]>; 749 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>; 761 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone], 765 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone], 804 def : InstRW<[WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], 833 def : InstRW<[WLat11LSU, RegReadAdv, FPU, LSU, NormalGr], 871 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEXR$")>; 885 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone], 902 def : InstRW<[WLat7, FPU, NormalGr], (instregex "H(E|D)R$")>; [all …]
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| H A D | SystemZScheduleZEC12.td | 84 def : WriteRes<FPU, [ZEC12_FPUnit]>; 89 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [ZEC12_FPUnit]>; 787 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>; 799 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone], 803 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone], 842 def : InstRW<[WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], 871 def : InstRW<[WLat11LSU, RegReadAdv, FPU, LSU, NormalGr], 909 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEXR$")>; 923 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone], 940 def : InstRW<[WLat7, FPU, NormalGr], (instregex "H(E|D)R$")>; [all …]
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| /llvm-project-15.0.7/lldb/source/Plugins/Process/Utility/ |
| H A D | RegisterInfoPOSIX_arm.cpp | 25 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm::FPU, fpscr) + \ 29 sizeof(RegisterInfoPOSIX_arm::FPU)) 32 sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \ 43 (sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \ 163 return sizeof(struct RegisterInfoPOSIX_arm::FPU); in GetFPRSize()
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| H A D | RegisterContextDarwin_arm64.h | 80 struct FPU { struct 114 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), // ARM_NEON_STATE64_COUNT 123 FPU fpu; 204 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0; 212 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
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| H A D | RegisterContextDarwin_x86_64.h | 80 struct FPU { struct 112 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), argument 119 FPU fpu; 190 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0; 196 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
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| H A D | RegisterContextDarwin_i386.h | 75 struct FPU { struct 107 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), argument 114 FPU fpu; 185 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0; 191 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
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| H A D | RegisterContextMach_x86_64.cpp | 31 FPU &fpu) { in DoReadFPU() 50 const FPU &fpu) { in DoWriteFPU() 52 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
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| H A D | RegisterContextMach_i386.cpp | 29 int RegisterContextMach_i386::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU() 47 const FPU &fpu) { in DoWriteFPU() 49 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
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| H A D | RegisterContextDarwin_arm.h | 98 struct FPU { struct 148 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), 156 FPU fpu; 237 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0; 245 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
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| H A D | RegisterContextMach_arm.cpp | 31 int RegisterContextMach_arm::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU() 54 const FPU &fpu) { in DoWriteFPU() 56 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
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| H A D | RegisterContextMach_i386.h | 24 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override; 30 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
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| H A D | RegisterContextMach_x86_64.h | 25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override; 31 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
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| H A D | RegisterContextMach_arm.h | 24 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override; 32 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
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| /llvm-project-15.0.7/llvm/test/MC/Mips/ |
| H A D | update-module-level-options.s | 6 # CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers 10 # CHECK-NOT: :[[@LINE-1]]:{{[0-9]+}}: error: -mno-odd-spreg prohibits the use of odd FPU registers 14 # CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers
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| H A D | set-oddspreg-nooddspreg-error.s | 6 # CHECK-NOT: :[[@LINE-1]]:{{[0-9]+}}: error: -mno-odd-spreg prohibits the use of odd FPU registers 10 # CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers
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| H A D | nooddspreg-error.s | 9 # CHECK-ERROR: :[[@LINE-1]]:15: error: -mno-odd-spreg prohibits the use of odd FPU registers 10 # CHECK-ERROR: :[[@LINE-2]]:25: error: -mno-odd-spreg prohibits the use of odd FPU registers
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| /llvm-project-15.0.7/lldb/source/Plugins/Process/MacOSX-Kernel/ |
| H A D | RegisterContextKDP_i386.h | 25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override; 31 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
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| H A D | RegisterContextKDP_x86_64.h | 25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override; 31 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
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| H A D | RegisterContextKDP_arm.h | 25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override; 33 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
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| H A D | RegisterContextKDP_arm64.h | 26 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override; 34 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
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| H A D | RegisterContextKDP_x86_64.cpp | 40 FPU &fpu) { in DoReadFPU() 88 const FPU &fpu) { in DoWriteFPU()
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| H A D | RegisterContextKDP_i386.cpp | 38 int RegisterContextKDP_i386::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU() 85 const FPU &fpu) { in DoWriteFPU()
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