| /llvm-project-15.0.7/mlir/test/Dialect/SPIRV/IR/ |
| H A D | gl-ops.mlir | 60 // CHECK: spv.GL.FMin {{%.*}}, {{%.*}} : f32 61 %2 = spv.GL.FMin %arg0, %arg1 : f32 68 // CHECK: spv.GL.FMin {{%.*}}, {{%.*}} : vector<3xf16> 69 %2 = spv.GL.FMin %arg0, %arg1 : vector<3xf16> 76 // CHECK: spv.GL.FMin {{%.*}}, {{%.*}} : f64 77 %2 = spv.GL.FMin %arg0, %arg1 : f64
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| /llvm-project-15.0.7/mlir/test/Conversion/SPIRVToLLVM/ |
| H A D | gl-ops-to-llvm.mlir | 82 // spv.GL.FMin 88 %0 = spv.GL.FMin %arg0, %arg0 : f32 90 %1 = spv.GL.FMin %arg1, %arg1 : vector<3xf16>
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| /llvm-project-15.0.7/mlir/test/Target/SPIRV/ |
| H A D | gl-ops.mlir | 46 // CHECK: {{%.*}} = spv.GL.FMin {{%.*}}, {{%.*}} : f32 47 %4 = spv.GL.FMin %arg0, %arg1 : f32
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| /llvm-project-15.0.7/llvm/include/llvm/Analysis/ |
| H A D | IVDescriptors.h | 48 FMin, ///< FP min implemented in terms of select(cmp()). enumerator 226 return Kind == RecurKind::FMin || Kind == RecurKind::FMax; in isFPMinMaxRecurrenceKind()
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | IVDescriptors.cpp | 699 return InstDesc(Kind == RecurKind::FMin, I); in isMinMaxPattern() 703 return InstDesc(Kind == RecurKind::FMin, I); in isMinMaxPattern() 707 return InstDesc(Kind == RecurKind::FMin, I); in isMinMaxPattern() 904 if (AddReductionVar(Phi, RecurKind::FMin, TheLoop, FMF, RedDes, DB, AC, DT, in isReductionPHI() 1089 case RecurKind::FMin: in getRecurrenceIdentity() 1126 case RecurKind::FMin: in getOpcode()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Utils/ |
| H A D | LowerAtomic.cpp | 79 case AtomicRMWInst::FMin: in buildAtomicRMWValue()
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| H A D | LoopUtils.cpp | 896 case RecurKind::FMin: in getMinMaxReductionPredicate() 1057 case RecurKind::FMin: in createSimpleTargetReduction()
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| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAtomicRMW.cpp | 68 case AtomicRMWInst::FMin: in isSaturating()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | ExpandReductions.cpp | 71 return RecurKind::FMin; in getRK()
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| H A D | AtomicExpandPass.cpp | 1655 case AtomicRMWInst::FMin: in GetRMWLibcall()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.h | 211 case RecurKind::FMin: in isLegalToVectorizeReduction()
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| /llvm-project-15.0.7/mlir/include/mlir/Dialect/SPIRV/IR/ |
| H A D | SPIRVGLOps.td | 642 def SPV_GLFMinOp : SPV_GLBinaryArithmeticOp<"FMin", 37, SPV_Float> { 659 fmin-op ::= ssa-id `=` `spv.GL.FMin` ssa-use `:` 665 %2 = spv.GL.FMin %0, %1 : f32 666 %3 = spv.GL.FMin %0, %1 : vector<3xf16> 957 minVal > maxVal. The semantics used by min() and max() are those of FMin and
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| /llvm-project-15.0.7/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstrInfo.td | 683 def OpGroupFMin: OpGroup<"FMin", 266>; 743 def OpGroupNonUniformFMin: OpGroupNUGroup<"FMin", 355>;
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| /llvm-project-15.0.7/llvm/lib/Frontend/OpenMP/ |
| H A D | OMPIRBuilder.cpp | 4033 case AtomicRMWInst::FMin: in emitRMWOpAsInstruction() 4310 NewOp = Op == OMPAtomicCompareOp::MAX ? AtomicRMWInst::FMin in createAtomicCompare() 4323 : AtomicRMWInst::FMin; in createAtomicCompare() 4351 case AtomicRMWInst::FMin: in createAtomicCompare()
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| /llvm-project-15.0.7/llvm/include/llvm/IR/ |
| H A D | Instructions.h | 763 FMin, 766 LAST_BINOP = FMin, 810 case AtomicRMWInst::FMin:
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| /llvm-project-15.0.7/mlir/docs/ |
| H A D | SPIRVToLLVMDialectConversion.md | 739 `spv.GL.FMin` | `llvm.intr.minnum`
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| /llvm-project-15.0.7/llvm/lib/IR/ |
| H A D | Core.cpp | 3606 case LLVMAtomicRMWBinOpFMin: return AtomicRMWInst::FMin; in mapFromLLVMRMWBinOp() 3628 case AtomicRMWInst::FMin: return LLVMAtomicRMWBinOpFMin; in mapToLLVMRMWBinOp()
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| H A D | Instructions.cpp | 1700 case AtomicRMWInst::FMin: in getOperationName()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 10539 if (Kind == RecurKind::FMax || Kind == RecurKind::FMin) { in isVectorizable() 10585 case RecurKind::FMin: in createOp() 10666 return RecurKind::FMin; in getRdxKind() 11434 case RecurKind::FMin: { in getReductionCost()
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| /llvm-project-15.0.7/mlir/test/Conversion/ArithmeticToSPIRV/ |
| H A D | arithmetic-to-spirv.mlir | 1071 // CHECK: spv.GL.FMin %{{.*}}, %{{.*}}: f32
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| /llvm-project-15.0.7/llvm/lib/Target/DirectX/DXILWriter/ |
| H A D | DXILBitcodeWriter.cpp | 601 case AtomicRMWInst::FMin: in getEncodedRMWOperation()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 2602 case RecurKind::FMin: in isLegalToVectorizeReduction()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | IRTranslator.cpp | 2934 case AtomicRMWInst::FMin: in translateAtomicRMW()
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | CGStmtOpenMP.cpp | 6039 RMWOp = IsXLHSInRHSPart ? llvm::AtomicRMWInst::FMin in emitOMPAtomicRMW() 6051 : llvm::AtomicRMWInst::FMin; in emitOMPAtomicRMW()
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| /llvm-project-15.0.7/llvm/lib/Bitcode/Writer/ |
| H A D | BitcodeWriter.cpp | 581 case AtomicRMWInst::FMin: return bitc::RMW_FMIN; in getEncodedRMWOperation()
|