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Searched refs:FMA4 (Results 1 – 17 of 17) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dfma4-commute-x86.ll9 ; FMA4: # %bb.0:
12 ; FMA4-NEXT: retq
19 ; FMA4: # %bb.0:
22 ; FMA4-NEXT: retq
29 ; FMA4: # %bb.0:
32 ; FMA4-NEXT: retq
43 ; FMA4-NEXT: retq
53 ; FMA4-NEXT: retq
63 ; FMA4-NEXT: retq
74 ; FMA4-NEXT: retq
[all …]
H A Dfma_patterns.ll22 ; FMA4: # %bb.0:
24 ; FMA4-NEXT: retq
42 ; FMA4: # %bb.0:
44 ; FMA4-NEXT: retq
64 ; FMA4-NEXT: retq
84 ; FMA4-NEXT: retq
104 ; FMA4-NEXT: retq
124 ; FMA4-NEXT: retq
148 ; FMA4-NEXT: retq
168 ; FMA4-NEXT: retq
[all …]
H A Dfma_patterns_wide.ll23 ; FMA4: # %bb.0:
26 ; FMA4-NEXT: retq
45 ; FMA4: # %bb.0:
48 ; FMA4-NEXT: retq
74 ; FMA4-NEXT: retq
96 ; FMA4-NEXT: retq
122 ; FMA4-NEXT: retq
144 ; FMA4-NEXT: retq
170 ; FMA4-NEXT: retq
193 ; FMA4-NEXT: retq
[all …]
H A Dfma-fneg-combine-2.ll13 ; FMA4: # %bb.0: # %entry
16 ; FMA4-NEXT: retq
33 ; FMA4: # %bb.0: # %entry
36 ; FMA4-NEXT: retq
54 ; FMA4: # %bb.0: # %entry
58 ; FMA4-NEXT: retq
76 ; FMA4: # %bb.0: # %entry
79 ; FMA4-NEXT: retq
100 ; FMA4-NEXT: retq
119 ; FMA4: # %bb.0:
[all …]
H A Dfp-intrinsics-fma.ll23 ; FMA4-LABEL: f1:
26 ; FMA4-NEXT: retq
51 ; FMA4-LABEL: f2:
54 ; FMA4-NEXT: retq
79 ; FMA4-LABEL: f3:
107 ; FMA4-LABEL: f4:
137 ; FMA4-LABEL: f5:
168 ; FMA4-LABEL: f6:
198 ; FMA4-LABEL: f7:
235 ; FMA4-LABEL: f8:
[all …]
H A Dfmsubadd-combine.ll23 ; FMA4-LABEL: mul_subadd_pd128:
24 ; FMA4: # %bb.0: # %entry
26 ; FMA4-NEXT: retq
49 ; FMA4-LABEL: mul_subadd_ps128:
50 ; FMA4: # %bb.0: # %entry
52 ; FMA4-NEXT: retq
75 ; FMA4-LABEL: mul_subadd_pd256:
78 ; FMA4-NEXT: retq
104 ; FMA4-NEXT: retq
141 ; FMA4-NEXT: retq
[all …]
H A Dfmaddsub-combine.ll24 ; FMA4-NEXT: retq
48 ; FMA4-NEXT: retq
72 ; FMA4-NEXT: retq
96 ; FMA4-NEXT: retq
129 ; FMA4-NEXT: retq
162 ; FMA4-NEXT: retq
186 ; FMA4-NEXT: retq
223 ; FMA4-NEXT: retq
252 ; FMA4-NEXT: retq
305 ; FMA4-NEXT: retq
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dlegalize-fdiv.mir41 ; SI-NEXT: [[FMA4:%[0-9]+]]:_(s32) = G_FMA [[FNEG]], [[FMA3]], [[INT2]]
140 ; SI-NEXT: [[FMA4:%[0-9]+]]:_(s32) = G_FMA [[FNEG]], [[FMA3]], [[INT2]]
159 ; VI-NEXT: [[FMA4:%[0-9]+]]:_(s32) = G_FMA [[FNEG]], [[FMA3]], [[INT2]]
178 ; GFX9-NEXT: [[FMA4:%[0-9]+]]:_(s32) = G_FMA [[FNEG]], [[FMA3]], [[INT2]]
244 ; SI-NEXT: [[FMA4:%[0-9]+]]:_(s32) = G_FMA [[FNEG]], [[FMA3]], [[INT2]]
265 ; VI-NEXT: [[FMA4:%[0-9]+]]:_(s32) = G_FMA [[FNEG]], [[FMA3]], [[INT2]]
286 ; GFX9-NEXT: [[FMA4:%[0-9]+]]:_(s32) = G_FMA [[FNEG]], [[FMA3]], [[INT2]]
465 ; SI-NEXT: [[FMA4:%[0-9]+]]:_(s64) = G_FMA [[FNEG]], [[FMUL]], [[INT3]]
491 ; VI-NEXT: [[FMA4:%[0-9]+]]:_(s64) = G_FMA [[FNEG]], [[FMUL]], [[INT3]]
586 ; SI-NEXT: [[FMA4:%[0-9]+]]:_(s32) = G_FMA [[FNEG]], [[FMA3]], [[INT2]]
[all …]
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrFMA.td386 // FMA4 - AMD 4 operand Fused Multiply-Add instructions
471 def rr : FMA4<opc, MRMSrcRegOp4, (outs VR128:$dst),
478 def rm : FMA4<opc, MRMSrcMemOp4, (outs VR128:$dst),
485 def mr : FMA4<opc, MRMSrcMem, (outs VR128:$dst),
498 def Yrr : FMA4<opc, MRMSrcRegOp4, (outs VR256:$dst),
505 def Yrm : FMA4<opc, MRMSrcMemOp4, (outs VR256:$dst),
512 def Ymr : FMA4<opc, MRMSrcMem, (outs VR256:$dst),
526 def rr_REV : FMA4<opc, MRMSrcReg, (outs VR128:$dst),
531 def Yrr_REV : FMA4<opc, MRMSrcReg, (outs VR256:$dst),
H A DX86InstrFormats.td926 // FMA4 Instruction Templates
927 class FMA4<bits<8> o, Format F, dag outs, dag ins, string asm,
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dfdiv.f64.ll27 ; GCN-DAG: v_fma_f64 [[FMA4:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[MUL]], [[SCALE1]]
28 ; GCN: v_div_fmas_f64 [[FMAS:v\[[0-9]+:[0-9]+\]]], [[FMA4]], [[FMA3]], [[MUL]]
/llvm-project-15.0.7/clang/lib/Basic/Targets/
H A DX86.cpp372 .Case("+fma4", FMA4) in handleTargetFeatures()
666 case FMA4: in getTargetDefines()
1006 .Case("fma4", XOPLevel >= FMA4) in hasFeature()
H A DX86.h71 enum XOPEnum { NoXOP, SSE4A, FMA4, XOP } XOPLevel = NoXOP; enumerator
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dlegalize-fma.mir101 ; NO-FP16: [[FMA4:%[0-9]+]]:_(s32) = G_FMA [[FPEXT12]], [[FPEXT13]], [[FPEXT14]]
102 ; NO-FP16: [[FPTRUNC4:%[0-9]+]]:_(s16) = G_FPTRUNC [[FMA4]](s32)
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Dfma.ll147 ; NO-FMA-NEXT: [[FMA4:%.*]] = call double @llvm.fma.f64(double [[A4]], double [[B4]], double [[C…
155 ; NO-FMA-NEXT: store double [[FMA4]], double* getelementptr inbounds ([8 x double], [8 x double]…
310 ; NO-FMA-NEXT: [[FMA4:%.*]] = call float @llvm.fma.f32(float [[A4]], float [[B4]], float [[C4]])
318 ; NO-FMA-NEXT: store float [[FMA4]], float* getelementptr inbounds ([16 x float], [16 x float]* …
429 ; NO-FMA-NEXT: [[FMA4:%.*]] = call float @llvm.fma.f32(float [[A4]], float [[B4]], float [[C4]])
445 ; NO-FMA-NEXT: store float [[FMA4]], float* getelementptr inbounds ([16 x float], [16 x float]* …
/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DX86TargetParser.def121 X86_FEATURE_COMPAT(FMA4, "fma4", 14)
/llvm-project-15.0.7/llvm/include/llvm/IR/
H A DIntrinsicsX86.td1802 // FMA3 and FMA4