| /llvm-project-15.0.7/clang/test/SemaTemplate/ |
| H A D | dependent-base-classes.cpp | 33 struct FI2 struct 35 C<typename FI2::type> a; // expected-error{{no type named 'type' in 'FI2<TT>'}} argument
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | captured-frame-index.ll | 99 ; GCN: v_mov_b32_e32 [[FI2:v[0-9]+]], 12{{$}} 100 ; GCN: buffer_store_dword [[FI2]], off, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:8{{$}} 137 ; GCN-DAG: v_mov_b32_e32 [[FI2:v[0-9]+]], 12{{$}} 138 ; GCN: buffer_store_dword [[FI2]], off, s{{\[[0-9]+:[0-9]+\]}}, 0{{$}}
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/GlobalISel/ |
| H A D | arm-legalize-vfp4.mir | 99 ; SOFT-ABI: [[FI2:%[0-9]+]]:_(p0) = G_PTR_ADD [[SP2]], [[OFF2]](s32) 100 ; SOFT-ABI: G_STORE [[Y1]](s32), [[FI2]](p0){{.*}}store (s32) into stack + 4, align 1)
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| H A D | irtranslator-varargs-lowering.ll | 17 ; CHECK: [[FI2:%[0-9]+]]:_(p0) = G_PTR_ADD [[SP2]], [[OFF2]](s32) 18 ; CHECK: G_STORE [[AVREG]](p0), [[FI2]](p0){{.*}}store (p0)
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| H A D | arm-param-lowering.ll | 39 ; CHECK: [[FI2:%[0-9]+]]:_(p0) = G_PTR_ADD [[SP2]], [[OFF2]](s32) 40 ; CHECK: G_STORE [[AVREG]](p0), [[FI2]](p0){{.*}}store (p0) 80 ; CHECK: [[FI2:%[0-9]+]]:_(p0) = G_PTR_ADD [[SP2]], [[OFF2]](s32) 81 ; CHECK: G_STORE [[ZEXTA2]](s32), [[FI2]](p0){{.*}}store (s32) 154 ; CHECK: [[FI2:%[0-9]+]]:_(p0) = G_PTR_ADD [[SP2]], [[OFF2]](s32) 155 ; CHECK: G_STORE [[AVREG]](s64), [[FI2]](p0){{.*}}store (s64)
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| /llvm-project-15.0.7/mlir/test/Conversion/NVGPUToNVVM/ |
| H A D | nvgpu-to-nvvm.mlir | 253 // CHECK-DAG: %[[FI2:.*]] = llvm.add %[[FI1]], %[[IDX1]] : i64 254 …// CHECK-DAG: %[[ADDRESSDST:.*]] = llvm.getelementptr %[[BASEDST]][%[[FI2]]] : (!llvm.ptr<f32, 3>,… 290 // CHECK-DAG: %[[FI2:.*]] = llvm.mul %[[IDX1]], %[[S2]] : i64 291 // CHECK-DAG: %[[FI3:.*]] = llvm.add %[[FI2]], %[[IDX1]] : i64
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| /llvm-project-15.0.7/llvm/test/tools/llvm-reduce/mir/ |
| H A D | preserve-frame-info.mir | 52 # RESULT-NEXT: [[FI2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.2, implicit $exec 65 # RESULT-NEXT: S_ENDPGM 0, implicit [[FI0]], implicit [[FI1]], implicit [[FI2]], implicit [[FI3]], …
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| /llvm-project-15.0.7/llvm/lib/Support/Windows/ |
| H A D | Path.inc | 558 BY_HANDLE_FILE_INFORMATION FI2; 559 if (!GetFileInformationByHandle(ToHandle2, &FI2)) 561 if (FI.nFileIndexHigh != FI2.nFileIndexHigh || 562 FI.nFileIndexLow != FI2.nFileIndexLow || 563 FI.dwVolumeSerialNumber != FI2.dwVolumeSerialNumber)
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| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | spill-01.ll | 389 ; [FI0, FI1] -> [FI1, FI2], but applied it in the form FI0 -> FI1 -> FI2,
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 348 unsigned FI2 = MI.getOperand(3).getIndex(); in isStackSlotCopy() local 350 MFI.getObjectSize(FI2) != Length) in isStackSlotCopy() 354 SrcFrameIndex = FI2; in isStackSlotCopy()
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| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 2706 auto isIdenticalOrStrongerFence = [](FenceInst *FI1, FenceInst *FI2) { in visitFenceInst() argument 2709 if (FI1SyncScope != FI2->getSyncScopeID() || in visitFenceInst() 2714 return isAtLeastOrStrongerThan(FI1->getOrdering(), FI2->getOrdering()); in visitFenceInst()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 3270 int64_t Offset1, unsigned Opcode1, int FI2, in shouldClusterFI() argument 3274 if (MFI.isFixedObjectIndex(FI1) && MFI.isFixedObjectIndex(FI2)) { in shouldClusterFI() 3276 int64_t ObjectOffset2 = MFI.getObjectOffset(FI2); in shouldClusterFI() 3292 return FI1 == FI2; in shouldClusterFI()
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 532 int FI2 = MF.getFrameInfo().CreateFixedObject(4, in LowerFormalArguments_32() local 535 SDValue FIPtr2 = DAG.getFrameIndex(FI2, PtrVT); in LowerFormalArguments_32()
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