| /llvm-project-15.0.7/llvm/include/llvm/BinaryFormat/ |
| H A D | MsgPack.def | 95 HANDLE_MP_FIX_LEN(0x02, Ext2)
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| /llvm-project-15.0.7/llvm/lib/BinaryFormat/ |
| H A D | MsgPackWriter.cpp | 180 case FixLen::Ext2: in writeExt()
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| H A D | MsgPackReader.cpp | 124 return createExt(Obj, FixLen::Ext2); in read()
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| /llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/ |
| H A D | lookahead.ll | 220 …al_uses(double* %A, double *%B, double *%C, double *%D, double *%S, double *%Ext1, double *%Ext2) {
310 …, double *%B, double *%C, double *%D, double *%S, double *%Ext1, double *%Ext2, double *%Ext3, dou…
386 store double %A1, double *%Ext2, align 8
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 12736 static bool areExtractExts(Value *Ext1, Value *Ext2) { in areExtractExts() argument
12743 !match(Ext2, m_ZExtOrSExt(m_Value())) || in areExtractExts()
12745 !areExtDoubled(cast<Instruction>(Ext2))) in areExtractExts()
12880 auto Ext2 = cast<Instruction>(I->getOperand(1)); in shouldSinkOperands() local
12881 if (areExtractShuffleVectors(Ext1->getOperand(0), Ext2->getOperand(0))) { in shouldSinkOperands()
12883 Ops.push_back(&Ext2->getOperandUse(0)); in shouldSinkOperands()
16783 const SDValue Ext2 = in performSignExtendSetCCCombine() local
16787 SDLoc(SetCC), N->getValueType(0), Ext1, Ext2, in performSignExtendSetCCCombine()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 14419 SDValue Ext2 = N->getOperand(1).getOperand(0); in DAGCombineBuildVector() local
14421 Ext2.getOpcode() != ISD::EXTRACT_VECTOR_ELT) in DAGCombineBuildVector()
14425 ConstantSDNode *Ext2Op = dyn_cast<ConstantSDNode>(Ext2.getOperand(1)); in DAGCombineBuildVector()
14429 Ext1.getOperand(0) != Ext2.getOperand(0)) in DAGCombineBuildVector()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 10176 SDValue Ext2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce() local
10181 SDValue Res1 = DAG.getNode(BaseOpcode, dl, EltVT, Ext2, Ext3, Op->getFlags()); in LowerVecReduce()
18953 static bool areExtractExts(Value *Ext1, Value *Ext2) { in areExtractExts() argument
18960 !match(Ext2, m_ZExtOrSExt(m_Value())) || in areExtractExts()
18962 !areExtDoubled(cast<Instruction>(Ext2))) in areExtractExts()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 11308 SDValue Ext2 = DAG.getNode(Opcode, DL, VT, Op2); in tryToFoldExtendSelectLoad() local
11309 return DAG.getSelect(DL, VT, N0->getOperand(0), Ext1, Ext2); in tryToFoldExtendSelectLoad()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 43644 SDValue Ext2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, in scalarizeExtEltFP() local
43646 return DAG.getNode(ISD::SELECT, DL, VT, Ext0, Ext1, Ext2); in scalarizeExtEltFP()
54538 SDValue Ext2 = extractSubVector(InVec.getOperand(2), 0, DAG, DL, 128); in combineEXTRACT_SUBVECTOR() local
54539 return DAG.getNode(InOpcode, DL, VT, Ext0, Ext1, Ext2); in combineEXTRACT_SUBVECTOR()
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