Home
last modified time | relevance | path

Searched refs:ESI (Results 1 – 25 of 46) sorted by relevance

12

/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dwin32-seh-catchpad-realign.ll4 ; use of ESI to address local variables.
53 ; The state is stored at ESI+56, the end of the node is ESI+60.
71 ; Recompute ESI by subtracting 60 from the end of the registration node.
H A DDynamicCalleeSavedRegisters.ll6 ; In RegCall calling convention, ESI and EDI are callee saved registers.
7 ; One might think that the caller could assume that ESI value is the same before
12 ; In this case we want to see that EDX/ECX values are saved and EDI/ESI are assumed
17 ; in registers: ESI, EBP, EAX, EDX and ECX.
48 ; in registers: EAX, ECX, EDX, EDI and ESI.
H A Dinline-asm-stack-realign2.ll3 ; FIXME: This is miscompiled due to our unconditional use of ESI as the base
H A Dcleanuppad-realign.ll43 ; We used to have a bug where we clobbered ESI after the prologue.
H A Dseh-stack-realign.ll64 ; Restore ESI
H A Dmem-intrin-base-reg.ll8 ; for when this is necessary. Typically, we chose ESI for the base register,
H A D2008-02-22-LocalRegAllocBug.ll4 ; Local register allocator was refusing to use ESI, EDI, and EBP so it ran out of
H A Dphysreg-pairs.ll7 ; ECX, EBX, ESI, EDI, EBP, ESP, to the value. There is no wrapping
/llvm-project-15.0.7/llvm/test/MC/COFF/
H A Dcv-def-range-gap.s12 # CHECK-NEXT: Register: ESI (0x17)
26 # CHECK-NEXT: Register: ESI (0x17)
36 # CHECK-NEXT: Register: ESI (0x17)
46 # CHECK-NEXT: Register: ESI (0x17)
/llvm-project-15.0.7/clang/lib/Sema/
H A DSemaExceptionSpec.cpp245 if (!isUnresolvedExceptionSpec(ESI.Type)) in UpdateExceptionSpec()
250 Context.adjustExceptionSpec(Redecl, ESI); in UpdateExceptionSpec()
369 if (ESI.Type == EST_Dynamic) { in CheckEquivalentExceptionSpec()
372 ESI.Exceptions = OldProto->exceptions(); in CheckEquivalentExceptionSpec()
375 if (ESI.Type == EST_NoexceptFalse) in CheckEquivalentExceptionSpec()
376 ESI.Type = EST_None; in CheckEquivalentExceptionSpec()
377 if (ESI.Type == EST_NoexceptTrue) in CheckEquivalentExceptionSpec()
378 ESI.Type = EST_BasicNoexcept; in CheckEquivalentExceptionSpec()
382 if (ESI.Type == EST_DependentNoexcept) { in CheckEquivalentExceptionSpec()
396 ESI.Type != EST_DependentNoexcept) { in CheckEquivalentExceptionSpec()
[all …]
H A DSemaTemplateInstantiate.cpp2225 [](FunctionProtoType::ExceptionSpecInfo &ESI, in SubstFunctionDeclType()
2237 FunctionProtoType::ExceptionSpecInfo &ESI, in SubstExceptionSpec() argument
2240 assert(ESI.Type != EST_Uninstantiated); in SubstExceptionSpec()
2244 return Instantiator.TransformExceptionSpec(Loc, ESI, ExceptionStorage, in SubstExceptionSpec()
2250 FunctionProtoType::ExceptionSpecInfo ESI = in SubstExceptionSpec() local
2255 ESI, ExceptionStorage, Args)) in SubstExceptionSpec()
2257 ESI.Type = EST_None; in SubstExceptionSpec()
2259 UpdateExceptionSpec(New, ESI); in SubstExceptionSpec()
/llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.cpp132 (siReg == X86::ESI && MI.getOperand(0).getReg() == X86::EDI) || in needsAddressSizeOverride()
135 return (!Is32BitMode && siReg == X86::ESI) || in needsAddressSizeOverride()
140 return (!Is32BitMode && siReg == X86::ESI) || in needsAddressSizeOverride()
201 {codeview::RegisterId::ESI, X86::ESI}, in initLLVMToSEHAndCVRegMapping()
749 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: in getX86SubSuperRegisterOrZero()
777 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: in getX86SubSuperRegisterOrZero()
814 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: in getX86SubSuperRegisterOrZero()
850 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: in getX86SubSuperRegisterOrZero()
851 return X86::ESI; in getX86SubSuperRegisterOrZero()
886 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: in getX86SubSuperRegisterOrZero()
H A DX86MCTargetDesc.h51 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7 enumerator
H A DX86WinCOFFTargetStreamer.cpp301 case X86::ESI: OS << "$esi"; break; in printFPOReg()
H A DX86AsmBackend.cpp1210 case X86::ESI: in PushInstrSize()
1229 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0 in getCompactUnwindRegNum()
/llvm-project-15.0.7/llvm/include/llvm/Support/Solaris/sys/
H A Dregset.h30 #undef ESI
/llvm-project-15.0.7/llvm/test/tools/llvm-exegesis/X86/
H A Danalysis-clustering-algorithms.test152 - 'ROL32ri ESI ESI i_0x1'
169 - 'ESI=0x0'
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86SelectionDAGInfo.cpp161 const unsigned SI = Use64BitRegs ? X86::RSI : X86::ESI; in emitRepmovs()
272 X86::ECX, X86::ESI, X86::EDI}; in EmitTargetCodeForMemcpy()
H A DX86CallingConv.td50 let GPR_32 = [EAX, ECX, EDX, EDI, ESI];
70 let GPR_32 = [EAX, ECX, EDX, EDI, ESI, R8D, R9D, R10D, R11D, R12D, R14D, R15D];
77 let GPR_32 = [EAX, ECX, EDX, EDI, ESI, R8D, R9D, R12D, R13D, R14D, R15D];
327 CCIfType<[i32], CCAssignToReg<[ESI, EBP, EAX, EDX]>>
547 CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D, R9D]>>,
1021 CCIfType<[i32], CCAssignToReg<[EBX, EBP, EDI, ESI]>>
1029 CCIfType<[i32], CCAssignToReg<[ESI, EBP, EAX, EDX, ECX]>>,
1042 CCIfType<[i32], CCIfSubtarget<"is64Bit()", CCAssignToReg<[EDI, ESI, EDX, ECX]>>>,
1128 def CSR_32 : CalleeSavedRegs<(add ESI, EDI, EBX, EBP)>;
1171 def CSR_32_AllRegs : CalleeSavedRegs<(add EAX, EBX, ECX, EDX, EBP, ESI,
[all …]
H A DX86RegisterInfo.td147 def ESI : X86Reg<"esi", 6, [SI, HSI]>, DwarfRegNum<[-2, 6, 6]>;
173 def RSI : X86Reg<"rsi", 6, [ESI]>, DwarfRegNum<[4, -2, -2]>;
421 (add EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP,
481 (add EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP)>;
530 def GR32_BSI : RegisterClass<"X86", [i32], 32, (add EBX, ESI)>;
531 def GR32_SIDI : RegisterClass<"X86", [i32], 32, (add ESI, EDI)>;
H A DX86CallingConv.cpp34 X86::ESI}; in CC_X86_32_RegCall_Assign2Regs()
H A DX86InstrInfo.td1457 let Defs = [EDI, ESI, EBP, EBX, EDX, ECX, EAX, ESP], Uses = [ESP],
1464 let Defs = [ESP], Uses = [EDI, ESI, EBP, EBX, EDX, ECX, EAX, ESP],
1543 let Defs = [EDI,ESI], Uses = [EDI,ESI,DF] in {
1583 let Defs = [EDI,ESI,EFLAGS], Uses = [EDI,ESI,DF] in {
2266 let Defs = [AL,ESI], Uses = [ESI,DF] in
2269 let Defs = [AX,ESI], Uses = [ESI,DF] in
2272 let Defs = [EAX,ESI], Uses = [ESI,DF] in
2275 let Defs = [RAX,ESI], Uses = [ESI,DF] in
2282 let Defs = [ESI], Uses = [DX,ESI,DF] in {
/llvm-project-15.0.7/llvm/lib/Target/X86/Disassembler/
H A DX86DisassemblerDecoder.h140 ENTRY(ESI) \
158 ENTRY(ESI) \
H A DX86Disassembler.cpp1821 baseRegNo = insn.hasAdSize ? X86::ESI : X86::RSI; in translateSrcIndex()
1823 baseRegNo = insn.hasAdSize ? X86::SI : X86::ESI; in translateSrcIndex()
1826 baseRegNo = insn.hasAdSize ? X86::ESI : X86::SI; in translateSrcIndex()
/llvm-project-15.0.7/llvm/test/DebugInfo/COFF/
H A Dlocal-variable-gap.ll76 ; OBJ-NEXT: Register: ESI (0x17)

12