| /llvm-project-15.0.7/llvm/lib/Support/ |
| H A D | Host.cpp | 560 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; in getVendorSignature() local 1080 unsigned EAX, EBX; in getAvailableFeatures() local 1139 if (HasLeaf7 && ((EBX >> 3) & 1)) in getAvailableFeatures() 1141 if (HasLeaf7 && ((EBX >> 5) & 1) && HasAVX) in getAvailableFeatures() 1143 if (HasLeaf7 && ((EBX >> 8) & 1)) in getAvailableFeatures() 1149 if (HasLeaf7 && ((EBX >> 19) & 1)) in getAvailableFeatures() 1153 if (HasLeaf7 && ((EBX >> 23) & 1)) in getAvailableFeatures() 1161 if (HasLeaf7 && ((EBX >> 29) & 1)) in getAvailableFeatures() 1217 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; in getHostCPUName() local 1664 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; in getHostCPUFeatures() local [all …]
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| /llvm-project-15.0.7/compiler-rt/lib/builtins/ |
| H A D | cpu_model.c | 603 unsigned EAX, EBX; in getAvailableFeatures() local 656 if (HasLeaf7 && ((EBX >> 3) & 1)) in getAvailableFeatures() 658 if (HasLeaf7 && ((EBX >> 5) & 1) && HasAVX) in getAvailableFeatures() 660 if (HasLeaf7 && ((EBX >> 8) & 1)) in getAvailableFeatures() 662 if (HasLeaf7 && ((EBX >> 16) & 1) && HasAVX512Save) in getAvailableFeatures() 664 if (HasLeaf7 && ((EBX >> 17) & 1) && HasAVX512Save) in getAvailableFeatures() 666 if (HasLeaf7 && ((EBX >> 21) & 1) && HasAVX512Save) in getAvailableFeatures() 668 if (HasLeaf7 && ((EBX >> 26) & 1) && HasAVX512Save) in getAvailableFeatures() 670 if (HasLeaf7 && ((EBX >> 27) & 1) && HasAVX512Save) in getAvailableFeatures() 747 unsigned EAX, EBX, ECX, EDX; in __cpu_indicator_init() local [all …]
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| /llvm-project-15.0.7/llvm/include/llvm/Support/Solaris/sys/ |
| H A D | regset.h | 27 #undef EBX
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| /llvm-project-15.0.7/bolt/unittests/Core/ |
| H A D | MCPlusBuilder.cpp | 122 Inst.addOperand(MCOperand::createReg(X86::EBX)); in TEST_P() 124 bool Replaced = BC->MIB->replaceRegWithImm(*II, X86::EBX, 1); in TEST_P()
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| /llvm-project-15.0.7/llvm/test/tools/llvm-exegesis/X86/ |
| H A D | analysis-clustering-algorithms.test | 148 - 'ROL32ri EBX EBX i_0x1' 165 - 'EBX=0x0'
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| /llvm-project-15.0.7/compiler-rt/lib/xray/ |
| H A D | xray_x86_64.cpp | 334 unsigned int EAX, EBX, ECX, EDX; in probeRequiredCPUFeatures() local 339 __asm__ __volatile__("cpuid" : "=a"(EAX), "=b"(EBX), "=c"(ECX), "=d"(EDX) in probeRequiredCPUFeatures()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 198 {codeview::RegisterId::EBX, X86::EBX}, in initLLVMToSEHAndCVRegMapping() 763 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero() 775 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero() 812 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero() 848 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero() 849 return X86::EBX; in getX86SubSuperRegisterOrZero() 884 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
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| H A D | X86MCTargetDesc.h | 51 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7 enumerator
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| H A D | X86WinCOFFTargetStreamer.cpp | 297 case X86::EBX: OS << "$ebx"; break; in printFPOReg()
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| H A D | X86AsmBackend.cpp | 1206 case X86::EBX: in PushInstrSize() 1229 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0 in getCompactUnwindRegNum()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.td | 146 def EBX : X86Reg<"ebx", 3, [BX, HBX]>, DwarfRegNum<[-2, 3, 3]>; 172 def RBX : X86Reg<"rbx", 3, [EBX]>, DwarfRegNum<[3, -2, -2]>; 421 (add EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP, 459 def GR32_ABCD : RegisterClass<"X86", [i32], 32, (add EAX, ECX, EDX, EBX)>; 481 (add EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP)>; 529 def GR32_CB : RegisterClass<"X86", [i32], 32, (add ECX, EBX)>; 530 def GR32_BSI : RegisterClass<"X86", [i32], 32, (add EBX, ESI)>;
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| H A D | X86CallingConv.td | 1021 CCIfType<[i32], CCAssignToReg<[EBX, EBP, EDI, ESI]>> 1128 def CSR_32 : CalleeSavedRegs<(add ESI, EDI, EBX, EBP)>; 1171 def CSR_32_AllRegs : CalleeSavedRegs<(add EAX, EBX, ECX, EDX, EBP, ESI, 1217 def CSR_32_RegCall_NoSSE : CalleeSavedRegs<(add ESI, EDI, EBX, EBP)>;
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| H A D | X86MCInstLower.cpp | 1067 .addReg(X86::EBX) in LowerTlsAddr() 1073 .addReg(X86::EBX) in LowerTlsAddr() 1085 .addReg(X86::EBX) in LowerTlsAddr()
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| H A D | X86ExpandPseudo.cpp | 536 TII->copyPhysReg(MBB, MBBI, DL, X86::EBX, InArg.getReg(), InArg.isKill()); in ExpandMI()
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| H A D | X86RegisterInfo.cpp | 70 BasePtr = Use64BitReg ? X86::RBX : X86::EBX; in X86RegisterInfo()
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| H A D | X86InstrInfo.td | 1457 let Defs = [EDI, ESI, EBP, EBX, EDX, ECX, EAX, ESP], Uses = [ESP], 1464 let Defs = [ESP], Uses = [EDI, ESI, EBP, EBX, EDX, ECX, EAX, ESP], 2230 let Defs = [EAX, EDX, EFLAGS], Uses = [EAX, EBX, ECX, EDX] in 2315 let Uses = [AL,EBX], Defs = [AL], hasSideEffects = 0, mayLoad = 1 in 2817 let Uses = [ ECX, EAX, EBX ] in {
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| H A D | X86InstrCompiler.td | 899 let Defs = [EAX, EDX, EFLAGS], Uses = [EAX, EBX, ECX, EDX], 956 // This pseudo must be used when the frame uses RBX/EBX as 959 let Defs = [EBX], Uses = [ECX, EAX],
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| /llvm-project-15.0.7/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86DisassemblerDecoder.h | 137 ENTRY(EBX) \ 155 ENTRY(EBX) \
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | 2010-02-19-TailCallRetAddrBug.ll | 14 ; CHECK: movl [[EBX:%[a-z]+]], 76(%esp)
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| H A D | physreg-pairs.ll | 7 ; ECX, EBX, ESI, EDI, EBP, ESP, to the value. There is no wrapping
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| /llvm-project-15.0.7/llvm/test/MC/X86/ |
| H A D | intel-syntax.s | 491 div EAX, [ECX*8+EBX+0xdeadbeef] 499 idiv EAX, [ECX*8+EBX+0xdeadbeef]
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| /llvm-project-15.0.7/llvm/lib/DebugInfo/CodeView/ |
| H A D | SymbolRecordMapping.cpp | 505 case EncodedFramePtrReg::BasePtr: return RegisterId::EBX; in decodeFramePtrReg() 538 case RegisterId::EBX: in encodeFramePtrReg()
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| /llvm-project-15.0.7/llvm/include/llvm/DebugInfo/CodeView/ |
| H A D | CodeViewRegisters.def | 71 CV_REGISTER(EBX, 20)
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| /llvm-project-15.0.7/llvm/docs/TableGen/ |
| H A D | index.rst | 67 AH, AL, AX, BH, BL, BP, BPL, BX, CH, CL, CX, DH, DI, DIL, DL, DX, EAX, EBP, EBX,
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| /llvm-project-15.0.7/llvm/docs/ |
| H A D | CodeGenerator.rst | 1414 such as ``ADD %EAX, %EBX``, in X86 is actually equivalent to ``%EAX = %EAX + 1415 %EBX``. 1461 %EBX = LOAD %mem_address 1462 %EAX = COPY %EBX 1559 1 ``EBX`` ``RBX``
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