Home
last modified time | relevance | path

Searched refs:Disp (Results 1 – 25 of 50) sorted by relevance

12

/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kISelDAGToDAG.cpp63 int64_t Disp; member
152 dbgs() << "\nDisp: " << Disp; in dump()
235 Disp = getI32Imm(AM.Disp, DL); in getFrameIndexAddress()
384 AM.Disp = Val; in foldOffsetIntoAddress()
613 AM.Disp += G->getOffset(); in matchWrapper()
716 if (AM.Disp == 0) { in SelectARID()
722 Disp = getI16Imm(AM.Disp, SDLoc(N)); in SelectARID()
788 Disp = getI8Imm(AM.Disp, SDLoc(N)); in SelectARII()
823 if (AM.Disp) { in SelectAL()
856 Disp = getI16Imm(AM.Disp, SDLoc(N)); in SelectPCD()
[all …]
H A DM68kRegisterInfo.cpp174 MachineOperand &Disp = MI.getOperand(FIOperandNum - 1); in eliminateFrameIndex() local
177 int Imm = (int)(Disp.getImm()); in eliminateFrameIndex()
210 Disp.ChangeToImmediate(FIOffset + Imm); in eliminateFrameIndex()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCCodeEmitter.cpp209 assert(isUInt<4>(Base) && isUInt<12>(Disp)); in getBDAddr12Encoding()
210 return (Base << 12) | Disp; in getBDAddr12Encoding()
219 assert(isUInt<4>(Base) && isInt<20>(Disp)); in getBDAddr20Encoding()
220 return (Base << 20) | ((Disp & 0xfff) << 8) | ((Disp & 0xff000) >> 12); in getBDAddr20Encoding()
231 return (Index << 16) | (Base << 12) | Disp; in getBDXAddr12Encoding()
242 return (Index << 24) | (Base << 20) | ((Disp & 0xfff) << 8) in getBDXAddr20Encoding()
243 | ((Disp & 0xff000) >> 12); in getBDXAddr20Encoding()
254 return (Len << 16) | (Base << 12) | Disp; in getBDLAddr12Len4Encoding()
265 return (Len << 16) | (Base << 12) | Disp; in getBDLAddr12Len8Encoding()
276 return (Len << 16) | (Base << 12) | Disp; in getBDRAddr12Encoding()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp60 int64_t Disp; member
90 errs() << " Disp " << Disp; in dump()
448 AM.Disp = TestDisp; in expandDisp()
531 if (Disp) { in shouldUseLA()
538 if (isUInt<12>(Disp)) in shouldUseLA()
543 if (!isInt<16>(Disp)) in shouldUseLA()
651 Disp = CurDAG->getTargetConstant(AM.Disp, SDLoc(Base), VT); in getAddressOperands()
1196 SDValue Base, Disp, Index; in tryGather() local
1230 SDValue Base, Disp, Index; in tryScatter() local
1391 SDValue Base, Disp; in tryFoldLoadStoreIntoMemOperand() local
[all …]
/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp46 int16_t Disp = 0; member
69 errs() << " Disp " << Disp << '\n'; in dump()
118 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
144 AM.Disp += G->getOffset(); in MatchWrapper()
149 AM.Disp += CP->getOffset(); in MatchWrapper()
186 AM.Disp += Val; in MatchAddress()
229 AM.Disp += Offset; in MatchAddress()
261 Disp = CurDAG->getTargetGlobalAddress(AM.GV, SDLoc(N), in SelectAddr()
262 MVT::i16, AM.Disp, in SelectAddr()
265 Disp = CurDAG->getTargetConstantPool(AM.CP, MVT::i16, AM.Alignment, AM.Disp, in SelectAddr()
[all …]
H A DMSP430AsmPrinter.cpp110 const MachineOperand &Disp = MI->getOperand(OpNum+1); in printSrcMemOperand() local
115 if (Disp.isImm() && Base.getReg() == MSP430::SR) in printSrcMemOperand()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp242 uint64_t Disp = Imm & 0xFFFF; in decodeMemRIOperands() local
278 uint64_t Disp = Imm & 0x3FFF; in decodeMemRIXOperands() local
305 Inst.addOperand(MCOperand::createImm(Disp)); in decodeMemRIHashOperands()
317 uint64_t Disp = Imm & 0xFFF; in decodeMemRIX16Operands() local
332 uint64_t Disp = Imm & 0x3FFFFFFFFUL; in decodeMemRI34PCRelOperands() local
346 uint64_t Disp = Imm & 0x3FFFFFFFFUL; in decodeMemRI34Operands() local
362 uint64_t Disp = Imm & 0x1F; in decodeSPE8Operands() local
366 Inst.addOperand(MCOperand::createImm(Disp << 3)); in decodeSPE8Operands()
378 uint64_t Disp = Imm & 0x1F; in decodeSPE4Operands() local
382 Inst.addOperand(MCOperand::createImm(Disp << 2)); in decodeSPE4Operands()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86OptimizeLEAs.cpp85 const MachineOperand *Disp) in MemOpKey() argument
86 : Disp(Disp) { in MemOpKey()
103 return isSimilarDispOp(*Disp, *Other.Disp); in operator ==()
110 const MachineOperand *Disp; member in __anon1b68b5870111::MemOpKey
137 assert(Val.Disp != PtrInfo::getTombstoneKey() && in getHashValue()
147 switch (Val.Disp->getType()) { in getHashValue()
167 Hash = hash_combine(Hash, Val.Disp->getMBB()); in getHashValue()
179 if (RHS.Disp == PtrInfo::getEmptyKey()) in isEqual()
180 return LHS.Disp == PtrInfo::getEmptyKey(); in isEqual()
181 if (RHS.Disp == PtrInfo::getTombstoneKey()) in isEqual()
[all …]
H A DX86InstrBuilder.h55 int Disp; member
60 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr), in X86AddressMode()
81 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags)); in getFullAddress()
83 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
114 AM.Disp = Op3.getImm(); in getAddressFromInstr()
185 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); in addFullAddress()
187 MIB.addImm(AM.Disp); in addFullAddress()
H A DX86ISelDAGToDAG.cpp70 int32_t Disp = 0; member
126 dbgs() << " Disp " << Disp << '\n' in dump()
311 Disp = CurDAG->getTargetBlockAddress(AM.BlockAddr, MVT::i32, AM.Disp, in getAddressOperands()
314 Disp = CurDAG->getTargetConstant(AM.Disp, DL, MVT::i32); in getAddressOperands()
1664 int64_t Val = AM.Disp + Offset; in foldOffsetIntoAddress()
1682 AM.Disp = Val; in foldOffsetIntoAddress()
2396 ((AM.Disp != 0) && (Backup.Disp == 0)) + in matchAddressRecursively()
2813 if (AM.Disp) in selectLEAAddr()
2833 AM.Disp += GA->getOffset(); in selectTLSADDRAddr()
4802 Disp, in Select()
[all …]
H A DX86FixupLEAs.cpp564 const MachineOperand &Disp = MI.getOperand(1 + X86::AddrDisp); in optTwoAddrLEA() local
567 if (Segment.getReg() != 0 || !Disp.isImm() || Scale.getImm() > 1 || in optTwoAddrLEA()
593 if (BaseReg != 0 && IndexReg != 0 && Disp.getImm() == 0 && in optTwoAddrLEA()
617 if (OptIncDec && (Disp.getImm() == 1 || Disp.getImm() == -1)) { in optTwoAddrLEA()
618 bool IsINC = Disp.getImm() == 1; in optTwoAddrLEA()
630 unsigned NewOpcode = getADDriFromLEA(MI.getOpcode(), Disp); in optTwoAddrLEA()
634 .addReg(BaseReg).addImm(Disp.getImm()) in optTwoAddrLEA()
638 .addReg(BaseReg).addImm(Disp.getImm()); in optTwoAddrLEA()
641 } else if (BaseReg != 0 && IndexReg != 0 && Disp.getImm() == 0) { in optTwoAddrLEA()
H A DX86ExpandPseudo.cpp459 int64_t Disp = MBBI->getOperand(1 + X86::AddrDisp).getImm(); in ExpandMI() local
460 assert(Disp >= 0 && Disp <= INT32_MAX - 2 && "Unexpected displacement"); in ExpandMI()
474 MIBHi.addImm(Disp + 2); in ExpandMI()
493 int64_t Disp = MBBI->getOperand(X86::AddrDisp).getImm(); in ExpandMI() local
494 assert(Disp >= 0 && Disp <= INT32_MAX - 2 && "Unexpected displacement"); in ExpandMI()
506 MIBHi.addImm(Disp + 2); in ExpandMI()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/Disassembler/
H A DSystemZDisassembler.cpp304 uint64_t Disp = Field & 0xfff; in decodeBDAddr12Operand() local
307 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDAddr12Operand()
325 uint64_t Disp = Field & 0xfff; in decodeBDXAddr12Operand() local
328 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDXAddr12Operand()
349 uint64_t Disp = Field & 0xfff; in decodeBDLAddr12Len4Operand() local
352 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDLAddr12Len4Operand()
361 uint64_t Disp = Field & 0xfff; in decodeBDLAddr12Len8Operand() local
364 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDLAddr12Len8Operand()
373 uint64_t Disp = Field & 0xfff; in decodeBDRAddr12Operand() local
376 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDRAddr12Operand()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/MSP430/MCTargetDesc/
H A DMSP430InstPrinter.cpp71 const MCOperand &Disp = MI->getOperand(OpNo+1); in printSrcMemOperand() local
84 if (Disp.isExpr()) in printSrcMemOperand()
85 Disp.getExpr()->print(O, &MAI); in printSrcMemOperand()
87 assert(Disp.isImm() && "Expected immediate in displacement field"); in printSrcMemOperand()
88 O << Disp.getImm(); in printSrcMemOperand()
/llvm-project-15.0.7/llvm/lib/Support/
H A DMSP430AttributeParser.cpp45 for (const DisplayHandler &Disp : DisplayRoutines) { in handler() local
46 if (uint64_t(Disp.Attribute) != Tag) in handler()
48 if (Error E = (this->*Disp.Routine)(static_cast<AttrType>(Tag))) in handler()
H A Draw_ostream.cpp567 sys::fs::CreationDisposition Disp, sys::fs::FileAccess Access, in getFD() argument
583 EC = sys::fs::openFileForReadWrite(Filename, FD, Disp, Flags); in getFD()
585 EC = sys::fs::openFileForWrite(Filename, FD, Disp, Flags); in getFD()
597 sys::fs::CreationDisposition Disp) in raw_fd_ostream() argument
598 : raw_fd_ostream(Filename, EC, Disp, sys::fs::FA_Write, sys::fs::OF_None) {} in raw_fd_ostream()
611 sys::fs::CreationDisposition Disp, in raw_fd_ostream() argument
614 : raw_fd_ostream(getFD(Filename, EC, Disp, Access, Flags), true) {} in raw_fd_ostream()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineInstrBuilder.h284 const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
291 TargetFlags = Disp.getTargetFlags();
293 switch (Disp.getType()) {
297 return addImm(Disp.getImm() + off);
299 return addConstantPoolIndex(Disp.getIndex(), Disp.getOffset() + off,
302 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
305 return addBlockAddress(Disp.getBlockAddress(), Disp.getOffset() + off,
309 return addJumpTableIndex(Disp.getIndex(), TargetFlags);
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp65 SDValue &Disp) { in SelectAddr() argument
73 Disp = CurDAG->getTargetConstant(0, dl, MVT::i8); in SelectAddr()
100 Disp = CurDAG->getTargetConstant(RHSC, dl, MVT::i16); in SelectAddr()
112 Disp = CurDAG->getTargetConstant(RHSC, dl, MVT::i8); in SelectAddr()
220 SDValue Base, Disp; in SelectInlineAsmMemoryOperand() local
222 if (SelectAddr(Op.getNode(), Op, Base, Disp)) { in SelectInlineAsmMemoryOperand()
224 OutOps.push_back(Disp); in SelectInlineAsmMemoryOperand()
255 SDValue Base, Disp; in SelectInlineAsmMemoryOperand() local
274 Disp = CurDAG->getTargetConstant( in SelectInlineAsmMemoryOperand()
277 Disp = ImmOp; in SelectInlineAsmMemoryOperand()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp327 const MCOperand &Disp = MI.getOperand(Op + X86::AddrDisp); in emitMemModRMByte() local
346 if (!(Disp.isExpr() && isa<MCSymbolRefExpr>(Disp.getExpr()))) in emitMemModRMByte()
394 int ImmSize = !Disp.isImm() && X86II::hasImm(TSFlags) in emitMemModRMByte()
442 if (Disp.isImm() && isInt<8>(Disp.getImm())) { in emitMemModRMByte()
443 if (Disp.getImm() == 0 && RMfield != 6) { in emitMemModRMByte()
498 if (Disp.isImm() && Disp.getImm() == 0 && AllowNoDisp) { in emitMemModRMByte()
504 if (Disp.isExpr()) { in emitMemModRMByte()
505 auto *Sym = dyn_cast<MCSymbolRefExpr>(Disp.getExpr()); in emitMemModRMByte()
520 if (Disp.isImm() && AllowDisp8) { in emitMemModRMByte()
555 } else if (Disp.isImm() && Disp.getImm() == 0 && AllowNoDisp && in emitMemModRMByte()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/
H A DX86Operand.h64 const MCExpr *Disp; member
152 if (Mem.Disp) in print()
153 PrintImmValue(Mem.Disp, ",Disp="); in print()
187 return Mem.Disp; in getMemDisp()
682 CreateMem(unsigned ModeSize, const MCExpr *Disp, SMLoc StartLoc, SMLoc EndLoc,
688 Res->Mem.Disp = Disp;
706 CreateMem(unsigned ModeSize, unsigned SegReg, const MCExpr *Disp,
723 Res->Mem.Disp = Disp;
H A DX86AsmParser.cpp2559 const MCExpr *Disp = SM.getSym(); in parseIntelOperand() local
2561 if (Disp && Imm) in parseIntelOperand()
2562 Disp = MCBinaryExpr::createAdd(Disp, ImmDisp, getContext()); in parseIntelOperand()
2563 if (!Disp) in parseIntelOperand()
2564 Disp = ImmDisp; in parseIntelOperand()
2649 } else if (!BaseReg && !IndexReg && Disp && in parseIntelOperand()
2650 Disp->getKind() == MCExpr::SymbolRef) { in parseIntelOperand()
2940 if (!Disp) { in ParseMemOperand()
2948 Disp = MCConstantExpr::create(0, Parser.getContext()); in ParseMemOperand()
3045 isa<MCConstantExpr>(Disp) && in ParseMemOperand()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/AsmParser/
H A DSystemZAsmParser.cpp123 const MCExpr *Disp; member
189 const MCExpr *Disp, unsigned Index, const MCExpr *LengthImm, in createMem() argument
196 Op->Mem.Disp = Disp; in createMem()
311 addExpr(Inst, Mem.Disp); in addBDAddrOperands()
317 addExpr(Inst, Mem.Disp); in addBDXAddrOperands()
324 addExpr(Inst, Mem.Disp); in addBDLAddrOperands()
331 addExpr(Inst, Mem.Disp); in addBDRAddrOperands()
338 addExpr(Inst, Mem.Disp); in addBDVAddrOperands()
740 OS << "Mem:" << *cast<MCConstantExpr>(Op.Disp); in print()
1006 if (getParser().parseExpression(Disp)) in parseAddress()
[all …]
/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DFileSystem.h966 CreationDisposition Disp, FileAccess Access,
983 Expected<file_t> openNativeFile(const Twine &Name, CreationDisposition Disp,
1066 CreationDisposition Disp = CD_CreateAlways,
1068 return openFile(Name, ResultFD, Disp, FA_Write, Flags, Mode);
1085 CreationDisposition Disp,
1088 return openNativeFile(Name, Disp, FA_Write, Flags, Mode);
1107 CreationDisposition Disp,
1110 return openFile(Name, ResultFD, Disp, FA_Write | FA_Read, Flags, Mode);
1127 CreationDisposition Disp,
1130 return openNativeFile(Name, Disp, FA_Write | FA_Read, Flags, Mode);
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dlea-opt-memop-check-1.ll4 ; Assertion `(Disp->isImm() || Disp->isGlobal()) && (Other.Disp->isImm() || Other.Disp->isGlobal())…
/llvm-project-15.0.7/llvm/unittests/Object/
H A DXCOFFObjectFileTest.cpp178 SmallVector<uint32_t, 8> Disp = TT.getControlledStorageInfoDisp().value(); in TEST() local
180 ASSERT_EQ(Disp.size(), 2UL); in TEST()
181 EXPECT_EQ(Disp[0], 0x05050000u); in TEST()
182 EXPECT_EQ(Disp[1], 0x06060000u); in TEST()

12