Searched refs:Demanded0 (Results 1 – 1 of 1) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1988 APInt Demanded0 = DemandedBits.lshr(IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() local
1990 if (SimplifyDemandedBits(Op0, Demanded0, DemandedElts, Known2, TLO, in SimplifyDemandedBits()
2005 if (!Demanded0.isAllOnes() || !Demanded1.isAllOnes() || in SimplifyDemandedBits()
2008 Op0, Demanded0, DemandedElts, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
2046 APInt Demanded0 = DemandedBits.rotr(IsROTL ? Amt : RevAmt); in SimplifyDemandedBits() local
2047 if (SimplifyDemandedBits(Op0, Demanded0, DemandedElts, Known2, TLO, in SimplifyDemandedBits()
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