Searched refs:DL0 (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/test/CodeGen/WebAssembly/ |
| H A D | lower-em-sjlj-debuginfo.ll | 19 ; CHECK-NEXT: call i8* @malloc(i32 40), !dbg ![[DL0:.*]]
20 ; CHECK-NEXT: bitcast {{.*}}, !dbg ![[DL0]]
23 ; CHECK: alloca {{.*}}, !dbg ![[DL0]]
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 5584 SDLoc DL0(N0); in visitANDLike() local
5586 DAG.getNode(ISD::ADD, DL0, VT, in visitANDLike()
8495 SDLoc DL0(N0); in visitXOR() local
8496 V = DAG.getNode(ISD::XOR, DL0, V.getValueType(), V, in visitXOR()
8497 DAG.getConstant(1, DL0, V.getValueType())); in visitXOR()
9583 SDLoc DL0(N0); in visitSRL() local
9584 SDValue SmallShift = DAG.getNode(ISD::SRL, DL0, SmallVT, in visitSRL()
9586 DAG.getConstant(ShiftAmt, DL0, in visitSRL()
11641 SDLoc DL0(N0); in CombineZExtLogicopShiftLoad() local
11642 SDValue And = DAG.getNode(N0.getOpcode(), DL0, VT, Shift, in CombineZExtLogicopShiftLoad()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 42883 SDLoc DL0(N0); in combineBitcast() local
42892 return DAG.getNode(Opcode, DL0, VT, LogicOp0.getOperand(0), CastedOp1); in combineBitcast()
42901 return DAG.getNode(Opcode, DL0, VT, LogicOp1.getOperand(0), CastedOp0); in combineBitcast()
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