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/llvm-project-15.0.7/llvm/include/llvm/ADT/
H A DGenericCycleImpl.h150 if (Cycle != BlockMapTopLevel.end())
151 return Cycle->second;
292 Cycle->Depth = Cycle->ParentCycle ? Cycle->ParentCycle->Depth + 1 : 1; in updateDepth()
386 CycleT *Cycle = getCycle(Block); in getCycleDepth() local
387 if (!Cycle) in getCycleDepth()
389 return Cycle->getDepth(); in getCycleDepth()
416 if (Cycle->ParentCycle) in validateTree()
417 check(is_contained(Cycle->ParentCycle->children(), Cycle)); in validateTree()
427 check(!Cycle->Entries.empty()); in validateTree()
448 for (const CycleT *Cycle = Entry.second; Cycle; in validateTree() local
[all …]
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/X86/
H A Dcpus.s29 # BARCELONA-NEXT: uOps Per Cycle: 0.97
34 # BDVER2-NEXT: uOps Per Cycle: 0.97
39 # BROADWELL-NEXT: uOps Per Cycle: 0.97
44 # BTVER2-NEXT: uOps Per Cycle: 0.97
49 # HASWELL-NEXT: uOps Per Cycle: 0.97
54 # ICX-NEXT: uOps Per Cycle: 0.97
59 # IVYBRIDGE-NEXT: uOps Per Cycle: 0.97
64 # KNL-NEXT: uOps Per Cycle: 0.97
69 # SANDYBRIDGE-NEXT: uOps Per Cycle: 0.97
74 # SKX-NEXT: uOps Per Cycle: 0.97
[all …]
H A Duop-queue.s23 # BTVER2-DEC-2-NEXT: uOps Per Cycle: 2.00
68 # BTVER2-DEC-1-NEXT: uOps Per Cycle: 1.00
73 # BTVER2-UOPQ-1-NEXT: uOps Per Cycle: 1.00
78 # BTVER2-UOPQ-2-NEXT: uOps Per Cycle: 2.00
83 # HASWELL-DEC-2-NEXT: uOps Per Cycle: 2.00
88 # HASWELL-UOPQ-1-NEXT: uOps Per Cycle: 1.00
93 # HASWELL-UOPQ-2-NEXT: uOps Per Cycle: 2.00
98 # HASWELL-UOPQ-3-NEXT: uOps Per Cycle: 3.00
103 # HASWELL-UOPQ-4-NEXT: uOps Per Cycle: 3.99
H A Dread-after-ld-1.s51 # BARCELONA-NEXT: uOps Per Cycle: 0.15
56 # BDVER2-NEXT: uOps Per Cycle: 0.12
61 # BDWELL-NEXT: uOps Per Cycle: 0.18
66 # BTVER2-NEXT: uOps Per Cycle: 0.08
71 # HASWELL-NEXT: uOps Per Cycle: 0.16
76 # SANDY-NEXT: uOps Per Cycle: 0.15
81 # SKYLAKE-NEXT: uOps Per Cycle: 0.17
86 # ZNVER1-NEXT: uOps Per Cycle: 0.10
91 # ZNVER2-NEXT: uOps Per Cycle: 0.10
96 # ZNVER3-NEXT: uOps Per Cycle: 0.12
H A Dvariable-blend-read-after-ld-1.s56 # BDVER2-NEXT: uOps Per Cycle: 0.20
61 # BDWELL-NEXT: uOps Per Cycle: 0.40
66 # BTVER2-NEXT: uOps Per Cycle: 0.36
71 # HASWELL-NEXT: uOps Per Cycle: 0.36
76 # IVY-NEXT: uOps Per Cycle: 0.36
81 # SANDY-NEXT: uOps Per Cycle: 0.36
86 # SKYLAKE-NEXT: uOps Per Cycle: 0.36
91 # ZNVER1-NEXT: uOps Per Cycle: 0.18
96 # ZNVER2-NEXT: uOps Per Cycle: 0.18
H A Dvariable-blend-read-after-ld-2.s56 # BDVER2-NEXT: uOps Per Cycle: 0.20
61 # BDWELL-NEXT: uOps Per Cycle: 0.40
66 # BTVER2-NEXT: uOps Per Cycle: 0.36
71 # HASWELL-NEXT: uOps Per Cycle: 0.36
76 # IVY-NEXT: uOps Per Cycle: 0.36
81 # SANDY-NEXT: uOps Per Cycle: 0.36
86 # SKYLAKE-NEXT: uOps Per Cycle: 0.36
91 # ZNVER1-NEXT: uOps Per Cycle: 0.18
96 # ZNVER2-NEXT: uOps Per Cycle: 0.18
H A Dbextr-read-after-ld.s39 # BDVER2-NEXT: uOps Per Cycle: 0.33
44 # BDWELL-NEXT: uOps Per Cycle: 0.40
49 # BTVER2-NEXT: uOps Per Cycle: 0.29
54 # HASWELL-NEXT: uOps Per Cycle: 0.40
59 # SKYLAKE-NEXT: uOps Per Cycle: 0.40
64 # ZNVER1-NEXT: uOps Per Cycle: 0.38
69 # ZNVER2-NEXT: uOps Per Cycle: 0.38
H A Dread-after-ld-3.s18 # BDWELL-NEXT: uOps Per Cycle: 0.33
23 # HASWELL-NEXT: uOps Per Cycle: 0.33
28 # SANDY-NEXT: uOps Per Cycle: 0.33
33 # SKYLAKE-NEXT: uOps Per Cycle: 0.33
H A Dbzhi-read-after-ld.s24 # BDWELL-NEXT: uOps Per Cycle: 0.33
29 # HASWELL-NEXT: uOps Per Cycle: 0.33
34 # SKYLAKE-NEXT: uOps Per Cycle: 0.33
39 # ZNVER1-NEXT: uOps Per Cycle: 0.38
44 # ZNVER2-NEXT: uOps Per Cycle: 0.38
H A Dfma3-read-after-ld-1.s33 # BDWELL-NEXT: uOps Per Cycle: 0.23
38 # HASWELL-NEXT: uOps Per Cycle: 0.21
43 # SKYLAKE-NEXT: uOps Per Cycle: 0.23
48 # ZNVER1-NEXT: uOps Per Cycle: 0.13
H A Dfma3-read-after-ld-2.s33 # BDWELL-NEXT: uOps Per Cycle: 0.23
38 # HASWELL-NEXT: uOps Per Cycle: 0.21
43 # SKYLAKE-NEXT: uOps Per Cycle: 0.23
48 # ZNVER1-NEXT: uOps Per Cycle: 0.13
H A Dllvm-mca-markers-5.s24 # CHECK-NEXT: uOps Per Cycle: 0.25
47 # CHECK-NEXT: uOps Per Cycle: 0.25
70 # CHECK-NEXT: uOps Per Cycle: 0.25
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DModuloSchedule.h90 DenseMap<MachineInstr *, int> Cycle; variable
108 DenseMap<MachineInstr *, int> Cycle, in ModuloSchedule() argument
110 : Loop(Loop), ScheduledInstrs(ScheduledInstrs), Cycle(std::move(Cycle)), in ModuloSchedule()
127 int getFirstCycle() { return Cycle[ScheduledInstrs.front()]; } in getFirstCycle()
131 int getFinalCycle() { return Cycle[ScheduledInstrs.back()]; } in getFinalCycle()
141 auto I = Cycle.find(MI); in getCycle()
142 return I == Cycle.end() ? -1 : I->second; in getCycle()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DP9InstrResources.td708 // 6 Cycle Load uses a single slice.
1133 // 33 Cycle DP Instruction Restricted and Cracked with 3 Cycle ALU.
1140 // 36 Cycle DP Instruction.
1153 // 36 Cycle DP Vector Instruction.
1160 // 27 Cycle DP Vector Instruction.
1167 // 36 Cycle DP Instruction Restricted and Cracked with 3 Cycle ALU.
1174 // 26 Cycle DP Instruction.
1186 // 26 Cycle DP Instruction Restricted and Cracked with 3 Cycle ALU.
1205 // 22 Cycle DP Instruction Restricted and Cracked with 2 Cycle ALU.
1293 // Two Cycle Branch
[all …]
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DMachineTraceMetrics.cpp792 unsigned Cycle = 0; in updateDepth() local
805 Cycle = std::max(Cycle, DepCycle); in updateDepth()
809 MICycles.Depth = Cycle; in updateDepth()
919 unsigned DepHeight = I->Cycle; in updatePhysDepsUpwards()
939 LRU.Cycle = Height; in updatePhysDepsUpwards()
1037 RegUnits[LI.Reg].Cycle = LI.Height; in computeInstrHeights()
1097 unsigned Cycle = 0; in computeInstrHeights() local
1100 Cycle = HeightI->second; in computeInstrHeights()
1112 Cycle = updatePhysDepsUpwards(MI, Cycle, RegUnits, MTM.SchedModel, in computeInstrHeights()
1121 MICycles.Height = Cycle; in computeInstrHeights()
[all …]
H A DMachineCycleAnalysis.cpp90 bool llvm::isCycleInvariant(const MachineCycle *Cycle, MachineInstr &I) { in isCycleInvariant() argument
124 } else if (any_of(Cycle->getEntries(), in isCycleInvariant()
141 if (Cycle->contains(MRI->getVRegDef(Reg)->getParent())) in isCycleInvariant()
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/AArch64/Exynos/
H A Dscheduler-queue-usage.s14 # M3-NEXT: uOps Per Cycle: 0.50
19 # M4-NEXT: uOps Per Cycle: 0.50
24 # M5-NEXT: uOps Per Cycle: 0.50
H A Ddirect-branch.s18 # M3-NEXT: uOps Per Cycle: 5.56
23 # M4-NEXT: uOps Per Cycle: 5.56
28 # M5-NEXT: uOps Per Cycle: 5.56
H A Dcrc.s23 # M3-NEXT: uOps Per Cycle: 1.96
27 # M4-NEXT: uOps Per Cycle: 0.99
31 # M5-NEXT: uOps Per Cycle: 1.96
H A Daes.s23 # M3-NEXT: uOps Per Cycle: 1.97
26 # M4-NEXT: uOps Per Cycle: 1.97
29 # M5-NEXT: uOps Per Cycle: 0.99
H A Dfloat-recp.s27 # M3-NEXT: uOps Per Cycle: 0.39
31 # M4-NEXT: uOps Per Cycle: 0.41
35 # M5-NEXT: uOps Per Cycle: 0.41
H A Ddouble-recp.s29 # M3-NEXT: uOps Per Cycle: 0.36
33 # M4-NEXT: uOps Per Cycle: 0.37
37 # M5-NEXT: uOps Per Cycle: 0.37
H A Dload.s31 # M3-NEXT: uOps Per Cycle: 1.23
32 # M4-NEXT: uOps Per Cycle: 1.07
33 # M5-NEXT: uOps Per Cycle: 1.07
H A Dfloat-rsqrt.s30 # M3-NEXT: uOps Per Cycle: 0.40
34 # M4-NEXT: uOps Per Cycle: 0.43
38 # M5-NEXT: uOps Per Cycle: 0.43
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/X86/BtVer2/
H A Dint-to-fpu-forwarding-2.s36 # CHECK-NEXT: uOps Per Cycle: 0.50
83 # CHECK-NEXT: uOps Per Cycle: 0.50
130 # CHECK-NEXT: uOps Per Cycle: 0.50
177 # CHECK-NEXT: uOps Per Cycle: 0.50
224 # CHECK-NEXT: uOps Per Cycle: 1.96
271 # CHECK-NEXT: uOps Per Cycle: 1.96

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