Searched refs:CombinedOffset (Results 1 – 4 of 4) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 1249 Register CombinedOffset, Register &VOffsetReg, in setBufferOffsets() argument 1255 if (Optional<int64_t> Imm = getIConstantVRegSExtVal(CombinedOffset, *MRI)) { in setBufferOffsets() 1273 AMDGPU::getBaseWithConstantOffset(*MRI, CombinedOffset); in setBufferOffsets() 1297 MachineInstr *Add = getOpcodeDef(AMDGPU::G_ADD, CombinedOffset, *MRI); in setBufferOffsets() 1320 if (RBI.getRegBank(CombinedOffset, *MRI, *RBI.TRI) == &AMDGPU::VGPRRegBank) { in setBufferOffsets() 1321 VOffsetReg = CombinedOffset; in setBufferOffsets() 1323 VOffsetReg = B.buildCopy(S32, CombinedOffset).getReg(0); in setBufferOffsets()
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| H A D | SIISelLowering.h | 248 void setBufferOffsets(SDValue CombinedOffset, SelectionDAG &DAG,
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| H A D | SIISelLowering.cpp | 8451 void SITargetLowering::setBufferOffsets(SDValue CombinedOffset, in setBufferOffsets() argument 8454 SDLoc DL(CombinedOffset); in setBufferOffsets() 8455 if (auto C = dyn_cast<ConstantSDNode>(CombinedOffset)) { in setBufferOffsets() 8466 if (DAG.isBaseWithConstantOffset(CombinedOffset)) { in setBufferOffsets() 8467 SDValue N0 = CombinedOffset.getOperand(0); in setBufferOffsets() 8468 SDValue N1 = CombinedOffset.getOperand(1); in setBufferOffsets() 8479 Offsets[0] = CombinedOffset; in setBufferOffsets()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 1886 int64_t CombinedOffset = CVal + GA->getOffset(); in SelectAddrRegImm() local 1890 CombinedOffset, GA->getTargetFlags()); in SelectAddrRegImm()
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