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Searched refs:CmpMI (Results 1 – 7 of 7) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ConditionOptimizer.cpp244 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp() argument
245 unsigned Opc = CmpMI->getOpcode(); in adjustCmp()
257 const int OldImm = (int)CmpMI->getOperand(2).getImm(); in adjustCmp()
278 MachineBasicBlock *const MBB = CmpMI->getParent(); in modifyCmp()
281 BuildMI(*MBB, CmpMI, CmpMI->getDebugLoc(), TII->get(Opc)) in modifyCmp()
282 .add(CmpMI->getOperand(0)) in modifyCmp()
283 .add(CmpMI->getOperand(1)) in modifyCmp()
285 .add(CmpMI->getOperand(3)); in modifyCmp()
286 CmpMI->eraseFromParent(); in modifyCmp()
320 CmpInfo Info = adjustCmp(CmpMI, Cmp); in adjustTo()
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H A DAArch64ConditionalCompares.cpp157 MachineInstr *CmpMI; member in __anoneb5605650111::SSACCmpConv
558 CmpMI = findConvertibleCompare(CmpBB); in canConvert()
559 if (!CmpMI) in canConvert()
562 if (!canSpeculateInstrs(CmpBB, CmpMI)) { in canConvert()
654 switch (CmpMI->getOpcode()) { in convert()
692 if (CmpMI->getOperand(FirstOp + 1).isReg()) in convert()
695 MachineInstrBuilder MIB = BuildMI(*Head, CmpMI, CmpMI->getDebugLoc(), MCID) in convert()
707 CmpMI->getOpcode() == AArch64::CBNZX; in convert()
708 BuildMI(*Head, CmpMI, CmpMI->getDebugLoc(), TII->get(AArch64::Bcc)) in convert()
712 CmpMI->eraseFromParent(); in convert()
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/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp72 MachineBasicBlock::iterator CmpMI = MI; in findVCMPToFoldIntoVPST() local
73 while (CmpMI != MI->getParent()->begin()) { in findVCMPToFoldIntoVPST()
74 --CmpMI; in findVCMPToFoldIntoVPST()
75 if (CmpMI->modifiesRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
77 if (CmpMI->readsRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
81 if (CmpMI == MI) in findVCMPToFoldIntoVPST()
83 NewOpcode = VCMPOpcodeToVPT(CmpMI->getOpcode()); in findVCMPToFoldIntoVPST()
88 if (registerDefinedBetween(CmpMI->getOperand(1).getReg(), std::next(CmpMI), in findVCMPToFoldIntoVPST()
91 if (registerDefinedBetween(CmpMI->getOperand(2).getReg(), std::next(CmpMI), in findVCMPToFoldIntoVPST()
94 return &*CmpMI; in findVCMPToFoldIntoVPST()
H A DARMBaseInstrInfo.cpp2121 if (CmpMI) in isProfitableToIfCvt()
5580 MachineBasicBlock::iterator CmpMI = Br; in findCMPToFoldIntoCBZ() local
5581 while (CmpMI != Br->getParent()->begin()) { in findCMPToFoldIntoCBZ()
5582 --CmpMI; in findCMPToFoldIntoCBZ()
5583 if (CmpMI->modifiesRegister(ARM::CPSR, TRI)) in findCMPToFoldIntoCBZ()
5585 if (CmpMI->readsRegister(ARM::CPSR, TRI)) in findCMPToFoldIntoCBZ()
5591 if (CmpMI->getOpcode() != ARM::tCMPi8 && CmpMI->getOpcode() != ARM::t2CMPri) in findCMPToFoldIntoCBZ()
5593 Register Reg = CmpMI->getOperand(0).getReg(); in findCMPToFoldIntoCBZ()
5595 ARMCC::CondCodes Pred = getInstrPredicate(*CmpMI, PredReg); in findCMPToFoldIntoCBZ()
5596 if (Pred != ARMCC::AL || CmpMI->getOperand(1).getImm() != 0) in findCMPToFoldIntoCBZ()
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H A DARMConstantIslandPass.cpp1949 MachineInstr *CmpMI = findCMPToFoldIntoCBZ(Br.MI, TRI); in optimizeThumb2Branches() local
1950 if (!CmpMI || CmpMI->getOpcode() != ARM::tCMPi8) in optimizeThumb2Branches()
1953 ImmCmp.MI = CmpMI; in optimizeThumb2Branches()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSILowerControlFlow.cpp761 auto CmpMI = BuildMI(*MBB, FirstMI, DL, TII->get(AMDGPU::S_CMP_EQ_U32)) in lowerInitExec() local
765 LV->getVarInfo(CountReg).Kills.push_back(CmpMI); in lowerInitExec()
782 LIS->InsertMachineInstrInMaps(*CmpMI); in lowerInitExec()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp4639 auto CmpMI = MIRBuilder.buildInstr(CmpOpc).addUse(LHS); in emitFPCompare() local
4640 CmpMI.setMIFlags(MachineInstr::NoFPExcept); in emitFPCompare()
4642 CmpMI.addUse(RHS); in emitFPCompare()
4643 constrainSelectedInstRegOperands(*CmpMI, TII, TRI, RBI); in emitFPCompare()
4644 return &*CmpMI; in emitFPCompare()