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Searched refs:CmpInstr (Results 1 – 13 of 13) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.cpp284 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, in optimizeCompareInstr() argument
293 MachineBasicBlock::iterator I = CmpInstr, E = MI, in optimizeCompareInstr()
294 B = CmpInstr.getParent()->begin(); in optimizeCompareInstr()
308 else if (MI->getParent() != CmpInstr.getParent() || CmpValue != 0) { in optimizeCompareInstr()
312 if (CmpInstr.getOpcode() == Lanai::SFSUB_F_RI_LO) in optimizeCompareInstr()
331 if (isRedundantFlagInstr(&CmpInstr, SrcReg, SrcReg2, CmpValue, &*I)) { in optimizeCompareInstr()
354 I = CmpInstr; in optimizeCompareInstr()
355 E = CmpInstr.getParent()->end(); in optimizeCompareInstr()
421 MachineBasicBlock *MBB = CmpInstr.getParent(); in optimizeCompareInstr()
430 CmpInstr.eraseFromParent(); in optimizeCompareInstr()
H A DLanaiInstrInfo.h105 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.h248 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
358 bool substituteCmpToZero(MachineInstr &CmpInstr, unsigned SrcReg,
360 bool removeCmpToZeroOrOne(MachineInstr &CmpInstr, unsigned SrcReg,
397 examineCFlagsUse(MachineInstr &MI, MachineInstr &CmpInstr,
H A DAArch64InstrInfo.cpp1425 assert(CmpInstr.getParent()); in optimizeCompareInstr()
1431 if (CmpInstr.definesRegister(AArch64::WZR) || in optimizeCompareInstr()
1432 CmpInstr.definesRegister(AArch64::XZR)) { in optimizeCompareInstr()
1433 CmpInstr.eraseFromParent(); in optimizeCompareInstr()
1436 unsigned Opc = CmpInstr.getOpcode(); in optimizeCompareInstr()
1441 CmpInstr.setDesc(MCID); in optimizeCompareInstr()
1442 CmpInstr.removeOperand(DeadNZCVIdx); in optimizeCompareInstr()
1449 if (CmpInstr.getOpcode() == AArch64::PTEST_PP) in optimizeCompareInstr()
1683 MachineInstr &CmpInstr, unsigned SrcReg, in substituteCmpToZero() argument
1701 CmpInstr.eraseFromParent(); in substituteCmpToZero()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp3033 MachineBasicBlock::iterator I = CmpInstr, E = MI, in optimizeCompareInstr()
3053 if (CmpInstr.getOpcode() == ARM::CMPri || in optimizeCompareInstr()
3054 CmpInstr.getOpcode() == ARM::t2CMPri || in optimizeCompareInstr()
3055 CmpInstr.getOpcode() == ARM::tCMPi8) in optimizeCompareInstr()
3090 E = CmpInstr; in optimizeCompareInstr()
3091 CmpInstr.getParent()->insert(E, MI); in optimizeCompareInstr()
3094 I = CmpInstr; in optimizeCompareInstr()
3154 I = CmpInstr; in optimizeCompareInstr()
3155 E = CmpInstr.getParent()->end(); in optimizeCompareInstr()
3258 MachineBasicBlock *MBB = CmpInstr.getParent(); in optimizeCompareInstr()
[all …]
H A DARMBaseInstrInfo.h298 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp971 static bool findRedundantFlagInstr(MachineInstr &CmpInstr, in findRedundantFlagInstr() argument
980 if (CmpInstr.getOpcode() != X86::TEST64rr) in findRedundantFlagInstr()
986 (CmpInstr.getOperand(0).getReg() == CmpInstr.getOperand(1).getReg()) && in findRedundantFlagInstr()
4261 switch (CmpInstr.getOpcode()) { in optimizeCompareInstr()
4282 switch (CmpInstr.getOpcode()) { in optimizeCompareInstr()
4300 CmpInstr.setDesc(get(NewOpcode)); in optimizeCompareInstr()
4301 CmpInstr.removeOperand(0); in optimizeCompareInstr()
4303 CmpInstr.dropDebugNumber(); in optimizeCompareInstr()
4334 MachineBasicBlock &CmpMBB = *CmpInstr.getParent(); in optimizeCompareInstr()
4431 std::next(MachineBasicBlock::iterator(CmpInstr)); in optimizeCompareInstr()
[all …]
H A DX86InstrInfo.h525 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp2384 bool PPCInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg, in optimizeCompareInstr() argument
2391 int OpC = CmpInstr.getOpcode(); in optimizeCompareInstr()
2392 Register CRReg = CmpInstr.getOperand(0).getReg(); in optimizeCompareInstr()
2467 MachineBasicBlock::iterator I = CmpInstr; in optimizeCompareInstr()
2470 for (MachineBasicBlock::iterator EL = CmpInstr.getParent()->end(); I != EL; in optimizeCompareInstr()
2499 else if (MI->getParent() != CmpInstr.getParent()) in optimizeCompareInstr()
2547 MachineBasicBlock::iterator E = MI, B = CmpInstr.getParent()->begin(); in optimizeCompareInstr()
2553 if (&*I != &CmpInstr && (Instr.modifiesRegister(PPC::CR0, TRI) || in optimizeCompareInstr()
2667 CmpInstr.eraseFromParent(); in optimizeCompareInstr()
H A DPPCInstrInfo.h624 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1552 virtual bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg, in optimizeCompareInstr() argument
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.h327 bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
H A DSIInstrInfo.cpp8314 bool SIInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg, in optimizeCompareInstr() argument
8324 const auto optimizeCmpAnd = [&CmpInstr, SrcReg, CmpValue, MRI, in optimizeCompareInstr()
8351 if (!Def || Def->getParent() != CmpInstr.getParent()) in optimizeCompareInstr()
8395 for (auto I = std::next(Def->getIterator()), E = CmpInstr.getIterator(); in optimizeCompareInstr()
8404 CmpInstr.eraseFromParent(); in optimizeCompareInstr()
8427 switch (CmpInstr.getOpcode()) { in optimizeCompareInstr()