| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 547 MachineInstrBuilder buildUAddo(const DstOp &Res, const DstOp &CarryOut, in buildUAddo() argument
553 MachineInstrBuilder buildUSubo(const DstOp &Res, const DstOp &CarryOut, in buildUSubo() argument
559 MachineInstrBuilder buildSAddo(const DstOp &Res, const DstOp &CarryOut, in buildSAddo() argument
565 MachineInstrBuilder buildSSubo(const DstOp &Res, const DstOp &CarryOut, in buildSSubo() argument
584 MachineInstrBuilder buildUAdde(const DstOp &Res, const DstOp &CarryOut, in buildUAdde() argument
587 return buildInstr(TargetOpcode::G_UADDE, {Res, CarryOut}, in buildUAdde()
592 MachineInstrBuilder buildUSube(const DstOp &Res, const DstOp &CarryOut, in buildUSube() argument
595 return buildInstr(TargetOpcode::G_USUBE, {Res, CarryOut}, in buildUSube()
600 MachineInstrBuilder buildSAdde(const DstOp &Res, const DstOp &CarryOut, in buildSAdde() argument
603 return buildInstr(TargetOpcode::G_SADDE, {Res, CarryOut}, in buildSAdde()
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoVPseudos.td | 2027 VPseudoBinaryCarryIn<!if(CarryOut, VR,
2037 VPseudoTiedBinaryCarryIn<!if(CarryOut, VR,
2047 VPseudoBinaryCarryIn<!if(CarryOut, VR,
2057 VPseudoTiedBinaryCarryIn<!if(CarryOut, VR,
2082 VPseudoBinaryCarryIn<!if(CarryOut, VR,
2092 VPseudoTiedBinaryCarryIn<!if(CarryOut, VR,
3815 bit CarryOut = 0,
3826 bit CarryOut = 0,
3838 bit CarryOut = 0> {
3848 bit CarryOut = 0,
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelDAGToDAG.cpp | 363 auto CarryOut = InvertCarryFlag(Subtarget, CurDAG, Dl, SDValue(NewNode, 1)); in selectSubCarry() local
366 ReplaceUses(SDValue(N, 1), CarryOut); in selectSubCarry()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIPeepholeSDWA.cpp | 879 MachineOperand *CarryOut = TII->getNamedOperand(MISucc, AMDGPU::OpName::sdst); in pseudoOpConvertToVOP2() local
880 if (!CarryOut) in pseudoOpConvertToVOP2()
882 if (!MRI->hasOneUse(CarryIn->getReg()) || !MRI->use_empty(CarryOut->getReg())) in pseudoOpConvertToVOP2()
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| H A D | AMDGPULegalizerInfo.cpp | 2996 Carry CarryOut; in buildMultiply() local
3050 CarryOut.push_back(Mad.getReg(1)); in buildMultiply()
3061 return CarryOut; in buildMultiply()
3133 if (Register CarryOut = mergeCarry(Accum[2 * i - 1], OddCarryIn)) in buildMultiply() local
3134 EvenCarryIn.push_back(CarryOut); in buildMultiply()
3137 if (Register CarryOut = mergeCarry(Accum[2 * i], EvenCarryIn)) in buildMultiply() local
3138 OddCarry.push_back(CarryOut); in buildMultiply()
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | sdwa-ops.mir | 90 # test for CarryOut used, should reject
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 3373 Register CarryOut = MI.getOperand(1).getReg(); in lower() local
3378 MIRBuilder.buildICmp(CmpInst::ICMP_ULT, CarryOut, Res, RHS); in lower()
3385 Register CarryOut = MI.getOperand(1).getReg(); in lower() local
3394 MIRBuilder.buildICmp(CmpInst::ICMP_ULT, CarryOut, Res, LHS); in lower()
5098 Register CarryOut = MRI.createGenericVirtualRegister(LLT::scalar(1)); in narrowScalarAddSub() local
5101 CarryOut = CarryDst; in narrowScalarAddSub()
5104 MIRBuilder.buildInstr(OpO, {DstReg, CarryOut}, in narrowScalarAddSub()
5107 MIRBuilder.buildInstr(OpF, {DstReg, CarryOut}, in narrowScalarAddSub()
5110 MIRBuilder.buildInstr(OpE, {DstReg, CarryOut}, in narrowScalarAddSub()
5115 CarryIn = CarryOut; in narrowScalarAddSub()
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 4300 llvm::Value *CarryOut = Builder.CreateZExt(Builder.CreateOr(Carry1, Carry2), in EmitBuiltinExpr() local
4302 Builder.CreateStore(CarryOut, CarryOutPtr); in EmitBuiltinExpr()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 53244 SDValue CarryOut = DAG.getConstant(0, DL, N->getValueType(1)); in combineADC() local
53250 return DCI.CombineTo(N, Res1, CarryOut); in combineADC()
|