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Searched refs:CSINV (Results 1 – 16 of 16) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dcond-sel-value-prop.ll74 ; CSINV to materialize the -1.
120 ; Rather than use a CNEG, use a CSINV to transform "a == 1 ? 1 : -1" to
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dselect-select.mir126 ; G_SELECT cc 0, -1 -> CSINV zreg, zreg cc
183 ; G_SELECT cc, -1, f -> CSINV f, zreg, inv_cc
475 ; G_SELECT cc, true, (G_XOR x, -1) -> CSINV true, x, cc
505 ; G_SELECT cc, (G_XOR x, -1), %false -> CSINV %x, %false, inv_cc
535 ; G_SELECT cc, true, (G_XOR x, -1) -> CSINV true, x, cc
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.h320 CSINV, // Conditional select invert. enumerator
H A DARMISelLowering.cpp1868 MAKE_CASE(ARMISD::CSINV) in getTargetNodeName()
5415 Opcode = ARMISD::CSINV; in LowerSELECT_CC()
13822 return DAG.getNode(ARMISD::CSINV, SDLoc(N), MVT::i32, in PerformSubCSINCCombine()
18649 case ARMISD::CSINV: in PerformDAGCombine()
19870 case ARMISD::CSINV: in computeKnownBitsForTargetNode()
19882 else if (Op.getOpcode() == ARMISD::CSINV) in computeKnownBitsForTargetNode()
H A DARMInstrInfo.td118 def ARMcsinv : SDNode<"ARMISD::CSINV", SDT_ARMCSel, [SDNPOptInGlue]>;
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64SchedThunderX2T99.td435 "CSINC(W|X)r", "CSINV(W|X)r",
457 "CSINC(W|X)r", "CSINV(W|X)r",
476 "CSINC(W|X)r", "CSINV(W|X)r",
H A DAArch64SchedThunderX3T110.td694 "CSINC(W|X)r", "CSINV(W|X)r",
716 "CSINC(W|X)r", "CSINV(W|X)r",
735 "CSINC(W|X)r", "CSINV(W|X)r",
H A DAArch64ISelLowering.h71 CSINV, // Conditional select invert. enumerator
H A DAArch64SchedCyclone.td149 // CSEL,CSINC,CSINV,CSNEG
H A DAArch64SchedTSV110.td380 def : InstRW<[TSV110Wr_1cyc_1ALUAB], (instregex "^(CSEL|CSINC|CSINV|CSNEG)(W|X)r$")>;
H A DAArch64SchedAmpere1.td948 (instregex "(CSEL|CSINC|CSINV|CSNEG)(X|W)")>;
H A DAArch64SchedA64FX.td829 "CSINC(W|X)r", "CSINV(W|X)r",
850 "CSINC(W|X)r", "CSINV(W|X)r",
868 "CSINC(W|X)r", "CSINV(W|X)r",
H A DAArch64SchedFalkorDetails.td894 def : InstRW<[FalkorWr_1XYZ_1cyc], (instregex "^(CSEL|CSINC|CSINV|CSNEG)(W|X)r$")>;
H A DAArch64SchedKryoDetails.td555 (instregex "(CSINV)(W|X)r")>;
H A DAArch64ISelLowering.cpp2054 MAKE_CASE(AArch64ISD::CSINV) in getTargetNodeName()
8165 Opcode = AArch64ISD::CSINV; in LowerSELECT_CC()
8229 Opcode = AArch64ISD::CSINV; in LowerSELECT_CC()
H A DAArch64InstrInfo.td551 def AArch64csinv : SDNode<"AArch64ISD::CSINV", SDT_AArch64CSel>;
2309 defm CSINV : CondSelectOp<1, 0b00, "csinv", not>;