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/llvm-project-15.0.7/mlir/test/Pass/
H A Dir-printing.mlir18 // BEFORE: // -----// IR Dump Before{{.*}}CSE (cse) //----- //
20 // BEFORE: // -----// IR Dump Before{{.*}}CSE (cse) //----- //
25 // BEFORE_ALL: // -----// IR Dump Before{{.*}}CSE (cse) //----- //
29 // BEFORE_ALL: // -----// IR Dump Before{{.*}}CSE (cse) //----- //
36 // AFTER: // -----// IR Dump After{{.*}}CSE (cse) //----- //
38 // AFTER: // -----// IR Dump After{{.*}}CSE (cse) //----- //
43 // AFTER_ALL: // -----// IR Dump After{{.*}}CSE (cse) //----- //
47 // AFTER_ALL: // -----// IR Dump After{{.*}}CSE (cse) //----- //
59 // AFTER_ALL_CHANGE: // -----// IR Dump After{{.*}}CSE (cse) //----- //
62 // We expect that only 'foo' changed during CSE, and the second run of CSE did
[all …]
H A Dpass-timing.mlir11 // LIST-DAG: CSE
20 // PIPELINE-NEXT: CSE
23 // PIPELINE-NEXT: CSE
33 // MT_LIST-DAG: CSE
42 // MT_PIPELINE-NEXT: CSE
45 // MT_PIPELINE-NEXT: CSE
H A Ddynamic-pipeline-nested.mlir17 // CSE" output: one for each of the function. If we don't nest, then we expect
18 // the CSE pass to run on the `inner_mod1` module directly.
20 // CHECK: Dump Before CSE
25 // NESTED: Dump Before CSE
H A Drun-reproducer.mlir21 // BEFORE: // -----// IR Dump Before{{.*}}CSE (cse) //----- //
23 // BEFORE: // -----// IR Dump Before{{.*}}CSE (cse) //----- //
H A Ddynamic-pipeline.mlir16 // MOD1: Dump Before CSE
23 // MOD1: Dump Before CSE
37 // MOD2: Dump Before CSE
H A Dpipeline-parsing.mlir29 // CHECK-NEXT: CSE
59 // GENERIC_MERGE_CHECK-NEXT: CSE
/llvm-project-15.0.7/flang/test/Fir/
H A Dbasic-program.fir19 // PASSES: CSE
20 // PASSES-NEXT: (S) 0 num-cse'd - Number of operations CSE'd
30 // PASSES-NEXT: CSE
31 // PASSES-NEXT: (S) 0 num-cse'd - Number of operations CSE'd
39 // PASSES-NEXT: CSE
40 // PASSES-NEXT: (S) 0 num-cse'd - Number of operations CSE'd
49 // PASSES-NEXT: CSE
50 // PASSES-NEXT: (S) 0 num-cse'd - Number of operations CSE'd
/llvm-project-15.0.7/mlir/lib/Transforms/
H A DCSE.cpp56 struct CSE : public CSEBase<CSE> { struct
111 void CSE::replaceUsesAndDelete(ScopedMapTy &knownValues, Operation *op, in replaceUsesAndDelete()
145 bool CSE::hasOtherSideEffectingOpInBetween(Operation *fromOp, Operation *toOp) { in hasOtherSideEffectingOpInBetween()
186 LogicalResult CSE::simplifyOperation(ScopedMapTy &knownValues, Operation *op, in simplifyOperation()
242 void CSE::simplifyBlock(ScopedMapTy &knownValues, Block *bb, in simplifyBlock()
271 void CSE::simplifyRegion(ScopedMapTy &knownValues, Region &region) { in simplifyRegion()
326 void CSE::runOnOperation() { in runOnOperation()
351 std::unique_ptr<Pass> mlir::createCSEPass() { return std::make_unique<CSE>(); } in createCSEPass()
H A DCMakeLists.txt6 CSE.cpp
/llvm-project-15.0.7/llvm/test/Transforms/EarlyCSE/AMDGPU/
H A Dintrinsics.ll15 ; CHECK: [[CSE:%[a-z0-9A-Z]+]] = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %in, i32 0, i32 …
16 ; CHECK: add i32 [[CSE]], [[CSE]]
26 ; CHECK: [[CSE:%[a-z0-9A-Z]+]] = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %in, i32 4, i32 …
27 ; CHECK: add i32 [[CSE]], [[CSE]]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dlegalize-ext-csedebug-output.mir19 ; CHECK: CSEInfo::CSE Hit for Opc {{[0-9]+}} : 1
20 ; CHECK: CSEInfo::CSE Hit for Opc {{[0-9]+}} : 1
21 ; CHECK: CSEInfo::CSE Hit for Opc {{[0-9]+}} : 1
/llvm-project-15.0.7/llvm/include/llvm/DebugInfo/CodeView/
H A DDebugSubsectionVisitor.h45 visitCrossModuleExports(DebugCrossModuleExportsSubsectionRef &CSE,
48 visitCrossModuleImports(DebugCrossModuleImportsSubsectionRef &CSE,
54 virtual Error visitSymbols(DebugSymbolsSubsectionRef &CSE,
/llvm-project-15.0.7/compiler-rt/lib/orc/unittests/
H A Derror_test.cpp91 if (auto CSE = error_cast<CustomSubError>(E)) { in TEST() local
111 if (auto CSE = error_cast<CustomSubError>(E)) { in TEST() local
112 EXPECT_EQ(CSE->getV1(), 42) << "Unexpected wrapped value"; in TEST()
113 EXPECT_EQ(CSE->getV2(), "foo") << "Unexpected wrapped value"; in TEST()
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dno-cse-nonlocal-convergent-instrs.mir4 # non-local CSE is illegal. The following test extends the definition of
8 # necessary to use `isConvergent` to prevent illegally CSE-ing the subset of
16 # The test checks that we don't CSE non-local convergent instrs. Otherwise,
18 # cause illegal codegen. Previously, the swizzle in bb2 would be CSE-ed in
/llvm-project-15.0.7/llvm/docs/HistoricalNotes/
H A D2001-06-01-GCCOptimizations.txt16 3 . Compute live ranges for CSE
18 5 . [t] CSE
27 14. [t] CSE
45 certainly want to move LLVM emission from step 8 down until at least CSE
/llvm-project-15.0.7/clang/lib/Sema/
H A DSemaConcept.cpp632 if (CSE->getTemplateArgsAsWritten()->NumTemplateArgs == 1) { in diagnoseWellFormedUnsatisfiedConstraintExpr()
634 CSE->getSourceRange().getBegin(), in diagnoseWellFormedUnsatisfiedConstraintExpr()
639 << CSE->getNamedConcept(); in diagnoseWellFormedUnsatisfiedConstraintExpr()
643 << (int)First << CSE; in diagnoseWellFormedUnsatisfiedConstraintExpr()
645 S.DiagnoseUnsatisfiedConstraint(CSE->getSatisfaction()); in diagnoseWellFormedUnsatisfiedConstraintExpr()
816 } else if (auto *CSE = dyn_cast<const ConceptSpecializationExpr>(E)) { in fromConstraintExpr() local
820 S, CSE->getExprLoc(), in fromConstraintExpr()
822 CSE->getSourceRange()); in fromConstraintExpr()
832 ConceptDecl *CD = CSE->getNamedConcept(); in fromConstraintExpr()
843 S, *New, CSE->getNamedConcept(), in fromConstraintExpr()
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/EarlyCSE/
H A Dconditional.ll4 ; Can we CSE a known condition to a constant?
24 ; We can CSE the condition, but we *don't* know it's value after the merge
59 ; Replace a use rather than CSE
/llvm-project-15.0.7/llvm/test/Analysis/MemorySSA/
H A Dpr36883.ll11 %load1 = call <8 x i16> @llvm.arm.neon.vld1.v8i16.p0i8(i8* %p, i32 2) #4 ; load CSE replacement
21 %load3 = call <8 x i16> @llvm.arm.neon.vld1.v8i16.p0i8(i8* %p, i32 2) #4 ; load CSE removed
/llvm-project-15.0.7/mlir/test/Transforms/
H A Dcse.mlir248 /// This test is checking that CSE gracefully handles values in graph regions
249 /// where the use occurs before the def, and one of the defs could be CSE'd with
269 /// This test is checking that CSE is removing duplicated read op that follow
281 /// This test is checking that CSE is removing duplicated read op that follow
300 /// This test is checking that CSE is not removing duplicated read op that
315 /// handled but the CSE pass.
/llvm-project-15.0.7/llvm/test/Other/
H A Dinvariant.group.ll5 ; These tests checks if passes with CSE functionality can do CSE on
16 ; FIXME: This one could be CSE
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dmachinelicm-cse-dead-flag.mir6 # This case tests that after the dead %3 is CSE-ed with hoisted %5 in MachineLICM
47 # This case tests that after the dead %3 is CSE-ed with hoisted dead %5 in
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-cse.ll6 ; CSE between "icmp reg reg" and "sub reg reg".
41 ; CSE between "icmp reg imm" and "sub reg imm".
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Drdrand.ll59 define i32 @CSE() nounwind {
60 ; X86-LABEL: CSE:
67 ; X64-LABEL: CSE:
/llvm-project-15.0.7/llvm/test/DebugInfo/MIR/X86/
H A Dmachine-cse.mir5 # two (MIR) function that have SHL/LEA instructions CSE'd in the bb.1.bb1 block.
8 # In the first (@t) there's only one use of %100, and that gets CSE'd away. The
121 ; Check for CSE happening and DBG_VALUE updating.
185 ; CSE should happen, DBG_VALUE updating should not.
/llvm-project-15.0.7/llvm/test/Transforms/EarlyCSE/AArch64/
H A Dintrinsics.ll8 ; Check that @llvm.aarch64.neon.ld2 is optimized away by Early CSE.
40 ; Check that the first @llvm.aarch64.neon.st2 is optimized away by Early CSE.
74 ; Check that the first @llvm.aarch64.neon.ld2 is optimized away by Early CSE.
107 ; away by Early CSE.
140 ; Check that @llvm.aarch64.neon.ld3 is not optimized away by Early CSE due
173 ; Check that @llvm.aarch64.neon.st3 is not optimized away by Early CSE due to

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