| /llvm-project-15.0.7/llvm/test/Transforms/SCCP/ |
| H A D | latticeval-invalidate.ll | 21 %C17 = fcmp ord double 4.940660e-324, 0x7FEFFFFFFFFFFFFF 22 %C2 = icmp uge i1 %C17, false 23 %G = getelementptr i32, i32* %P, i1 %C17 26 %B3 = xor i1 %C17, %C2 31 %C35 = icmp eq i1 %C17, undef
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| /llvm-project-15.0.7/clang/include/clang/Basic/ |
| H A D | LangStandard.h | 51 C17 = (1 << 3), enumerator 101 bool isC17() const { return Flags & C17; } in isC17()
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| H A D | LangStandards.def | 78 // C17 modes 81 LineComment | C99 | C11 | C17 | Digraphs | HexFloat) 87 LineComment | C99 | C11 | C17 | Digraphs | GNUMode | HexFloat) 93 LineComment | C99 | C11 | C17 | C2x | Digraphs | HexFloat) 96 LineComment | C99 | C11 | C17 | C2x | Digraphs | GNUMode | HexFloat)
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| H A D | LangOptions.def | 88 LANGOPT(C17 , 1, 0, "C17")
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| /llvm-project-15.0.7/clang/test/Parser/ |
| H A D | cxx2a-concept-declaration.cpp | 82 template<typename T> concept C17 = T{}; 83 static_assert(!C17<bool>);
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| /llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/infrastructure/ |
| H A D | nolint.cpp | 61 class C17 { C17(int i); }; // NOLINT(google-explicit-constructor): suppress check because <reason> class
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| /llvm-project-15.0.7/clang/test/Modules/ |
| H A D | requires.m | 30 // [email protected]/module.map:55 {{module 'DependsOnModule.C17' requires f… 31 @import DependsOnModule.C17; // expected-note {{module imported here}}
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/ |
| H A D | combine-udiv.mir | 89 ; CHECK-NEXT: [[C17:%[0-9]+]]:_(s16) = G_CONSTANT i16 512 95 … = G_BUILD_VECTOR [[C9]](s16), [[C11]](s16), [[C13]](s16), [[C16]](s16), [[C17]](s16), [[C18]](s16… 157 ; CHECK-NEXT: [[C17:%[0-9]+]]:_(s16) = G_CONSTANT i16 -10347 162 … = G_BUILD_VECTOR [[C9]](s16), [[C12]](s16), [[C14]](s16), [[C15]](s16), [[C17]](s16), [[C18]](s16… 219 ; CHECK-NEXT: [[C17:%[0-9]+]]:_(s16) = G_CONSTANT i16 1041 222 …), [[C10]](s16), [[C12]](s16), [[C13]](s16), [[C14]](s16), [[C15]](s16), [[C17]](s16), [[C18]](s16) 321 ; CHECK-NEXT: [[C17:%[0-9]+]]:_(s16) = G_CONSTANT i16 -29991 325 …CTOR [[C8]](s16), [[C9]](s16), [[C12]](s16), [[C13]](s16), [[C15]](s16), [[C17]](s16), [[C18]](s16…
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| H A D | arm64-irtranslator-switch.ll | 249 ; CHECK: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 21 430 ; CHECK: [[ICMP17:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C17]] 1104 ; CHECK: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 1210 …%bb.24, [[C14]](s32), %bb.9, [[C15]](s32), %bb.10, [[C16]](s32), %bb.11, [[C17]](s32), %bb.12, [[C…
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| /llvm-project-15.0.7/clang/test/Modules/Inputs/DependsOnModule.framework/ |
| H A D | module.map | 55 explicit module C17 {
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
| H A D | legalize-fptrunc.mir | 151 ; CHECK-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 30 152 ; CHECK-NEXT: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[ADD]](s32), [[C17]] 232 ; CHECK-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 30 233 ; CHECK-NEXT: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[ADD]](s32), [[C17]] 278 ; CHECK-NEXT: [[ICMP14:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[ADD2]](s32), [[C17]] 359 ; CHECK-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 30 360 ; CHECK-NEXT: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[ADD]](s32), [[C17]] 440 ; CHECK-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 30 441 ; CHECK-NEXT: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[ADD]](s32), [[C17]] 486 ; CHECK-NEXT: [[ICMP14:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[ADD2]](s32), [[C17]]
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| H A D | legalize-ctpop.mir | 318 ; CHECK-NEXT: [[C17:%[0-9]+]]:_(s16) = G_CONSTANT i16 13 319 ; CHECK-NEXT: [[LSHR14:%[0-9]+]]:_(s16) = G_LSHR [[TRUNC]], [[C17]](s16) 336 ; CHECK-NEXT: [[LSHR29:%[0-9]+]]:_(s16) = G_LSHR [[TRUNC1]], [[C17]](s16) 351 ; CHECK-NEXT: [[LSHR44:%[0-9]+]]:_(s16) = G_LSHR [[TRUNC2]], [[C17]](s16) 366 ; CHECK-NEXT: [[LSHR59:%[0-9]+]]:_(s16) = G_LSHR [[TRUNC3]], [[C17]](s16) 407 ; CHECK-NEXT: [[SHL12:%[0-9]+]]:_(s16) = G_SHL [[AND15]], [[C17]](s16) 453 ; CHECK-NEXT: [[SHL27:%[0-9]+]]:_(s16) = G_SHL [[AND31]], [[C17]](s16) 499 ; CHECK-NEXT: [[SHL42:%[0-9]+]]:_(s16) = G_SHL [[AND47]], [[C17]](s16) 545 ; CHECK-NEXT: [[SHL57:%[0-9]+]]:_(s16) = G_SHL [[AND63]], [[C17]](s16) 592 ; CHECK-NEXT: [[SHL72:%[0-9]+]]:_(s16) = G_SHL [[COPY14]], [[C17]](s16) [all …]
|
| H A D | legalize-implicit-def-s1025.mir | 170 ; TAHITI-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 17 171 ; TAHITI-NEXT: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[AND47]], [[C17]](s32) 290 ; FIJI-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 291 ; FIJI-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C17]](s32)
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| H A D | legalize-merge-values.mir | 733 ; CHECK-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 17 734 ; CHECK-NEXT: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[COPY17]], [[C17]](s32) 842 ; CHECK-NEXT: [[SHL47:%[0-9]+]]:_(s32) = G_SHL [[COPY49]], [[C17]](s32) 936 ; CHECK-NEXT: [[SHL78:%[0-9]+]]:_(s32) = G_SHL [[COPY81]], [[C17]](s32)
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| H A D | legalize-extract-vector-elt.mir | 1492 ; CHECK-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 60 1493 ; CHECK-NEXT: [[PTR_ADD17:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C17]](s32) 1698 ; CHECK-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 18 1699 ; CHECK-NEXT: [[LSHR17:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C17]](s32) 1779 ; CHECK-NEXT: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[AND18]], [[C17]](s32)
|
| /llvm-project-15.0.7/bolt/test/AArch64/Inputs/ |
| H A D | go_dwarf.yaml | 62 …- 'GNU C17 9.3.0 -mlittle-endian -mabi=lp64 -g -O3 -fasynchronous-unwind-tables -fstack-protector-…
|
| /llvm-project-15.0.7/libc/docs/ |
| H A D | index.rst | 17 - Fully compliant with current C standards (C17 and upcoming C2x) and POSIX.
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.td | 232 def C17 : Ri< 17, "C17">; 312 def C16_C17 : Rdi<16, "C16", [C16, C17]>;
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| /llvm-project-15.0.7/clang/lib/Basic/ |
| H A D | LangOptions.cpp | 105 Opts.C17 = Std.isC17(); in setLangDefaults()
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| H A D | Module.cpp | 113 .Case("c17", LangOpts.C17) in hasFeature()
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| /llvm-project-15.0.7/llvm/test/Transforms/InstCombine/ |
| H A D | shift.ll | 1697 ; CHECK-NEXT: [[C17:%.*]] = select i1 [[TMP1]], i1 [[C171]], i1 false 1698 ; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[C17]] to i64 1714 %C17 = icmp sgt i177 %B36, %B24 1715 %G62 = getelementptr i177, i177* %G11, i1 %C17 1741 %C17 = icmp sgt i177 %B, %B24 1742 %G62 = getelementptr i177, i177* %G11, i1 %C17
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| /llvm-project-15.0.7/mlir/test/Conversion/TosaToLinalg/ |
| H A D | tosa-to-linalg.mlir | 977 // CHECK: [[C17:%.+]] = arith.constant 17 980 // CHECK-DAG: [[IN_ZEROED:%.+]] = arith.subi [[IN32]], [[C17]] 998 // CHECK: [[C17:%.+]] = arith.constant 17 1001 // CHECK-DAG: [[IN_ZEROED:%.+]] = arith.subi [[IN32]], [[C17]] 1050 // CHECK: [[C17:%.+]] = arith.constant 17 1054 // CHECK-DAG: [[IN_ZEROED:%.+]] = arith.subi [[IN32]], [[C17]]
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 131 SP::C16, SP::C17, SP::C18, SP::C19,
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| /llvm-project-15.0.7/clang/unittests/Frontend/ |
| H A D | CompilerInvocationTest.cpp | 943 ASSERT_TRUE(Invocation.getLangOpts()->C17); in TEST_F()
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| /llvm-project-15.0.7/clang/lib/Frontend/ |
| H A D | InitPreprocessor.cpp | 443 else if (LangOpts.C17) in InitializeStandardPredefinedMacros()
|