Searched refs:ByteIdx (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 994 SDValue ByteIdx = convertToByteIndex(IdxV, ElemTy, DAG); in extractHvxElementReg() local
996 {VecV, ByteIdx}); in extractHvxElementReg()
1051 SDValue ByteIdx = convertToByteIndex(IdxV, ElemTy, DAG); in insertHvxElementReg() local
1053 return InsertWord(VecV, ValV, ByteIdx); in insertHvxElementReg()
1058 {ByteIdx, DAG.getConstant(2, dl, MVT::i32)}); in insertHvxElementReg()
1070 return InsertWord(VecV, Ins, ByteIdx); in insertHvxElementReg()
1305 SDValue ByteIdx; in insertHvxSubvectorPred() local
1309 ByteIdx = DAG.getNode(ISD::MUL, dl, MVT::i32, IdxV, in insertHvxSubvectorPred()
1311 ByteVec = DAG.getNode(HexagonISD::VROR, dl, ByteTy, ByteVec, ByteIdx); in insertHvxSubvectorPred()
1325 SDValue ByteXdi = DAG.getNode(ISD::SUB, dl, MVT::i32, HwLenV, ByteIdx); in insertHvxSubvectorPred()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1041 SDValue ByteIdx = DAG.getNode(ISD::AND, DL, MVT::i32, LoadPtr, in lowerPrivateTruncStore() local
1045 SDValue ShiftAmt = DAG.getNode(ISD::SHL, DL, MVT::i32, ByteIdx, in lowerPrivateTruncStore()
1270 SDValue ByteIdx = DAG.getNode(ISD::AND, DL, MVT::i32, in lowerPrivateExtLoad() local
1274 SDValue ShiftAmt = DAG.getNode(ISD::SHL, DL, MVT::i32, ByteIdx, in lowerPrivateExtLoad()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Utils/ |
| H A D | Local.cpp | 3082 for (unsigned ByteIdx = 0; ByteIdx < ByteWidth; ++ByteIdx) { in collectBitParts() local
3083 unsigned ByteBitOfs = ByteIdx * 8; in collectBitParts()
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