| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMBasicBlockInfo.cpp | 97 unsigned BrOffset = getOffsetOf(MI) + PCAdj; in isBBInRange() local
104 << int(DestOffset - BrOffset) << "\t" << *MI); in isBBInRange()
106 if (BrOffset <= DestOffset) { in isBBInRange()
108 if (DestOffset-BrOffset <= MaxDisp) in isBBInRange()
111 if (BrOffset-DestOffset <= MaxDisp) in isBBInRange()
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| H A D | ARMConstantIslandPass.cpp | 1941 unsigned BrOffset = BBUtils->getOffsetOf(Br.MI) + 4 - 2; in optimizeThumb2Branches() local
1944 if (BrOffset >= DestOffset || (DestOffset - BrOffset) > 126) in optimizeThumb2Branches()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.cpp | 318 return isInt<18>(BrOffset); in isBranchOffsetInRange()
334 return isInt<17>(BrOffset); in isBranchOffsetInRange()
338 return isInt<11>(BrOffset); in isBranchOffsetInRange()
342 return isInt<8>(BrOffset); in isBranchOffsetInRange()
347 return isInt<28>(BrOffset); in isBranchOffsetInRange()
371 return isInt<18>(BrOffset); in isBranchOffsetInRange()
375 return isInt<23>(BrOffset); in isBranchOffsetInRange()
379 return isInt<11>(BrOffset); in isBranchOffsetInRange()
383 return isInt<8>(BrOffset); in isBranchOffsetInRange()
387 return isInt<27>(BrOffset); in isBranchOffsetInRange()
[all …]
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| H A D | MipsConstantIslandPass.cpp | 1455 unsigned BrOffset = getOffsetOf(MI) + PCAdj; in isBBInRange() local
1462 << int(DestOffset - BrOffset) << "\t" << *MI); in isBBInRange()
1464 if (BrOffset <= DestOffset) { in isBBInRange()
1466 if (DestOffset-BrOffset <= MaxDisp) in isBBInRange()
1469 if (BrOffset-DestOffset <= MaxDisp) in isBBInRange()
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| H A D | MipsInstrInfo.h | 90 int64_t BrOffset) const override;
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| /llvm-project-15.0.7/llvm/lib/Target/AVR/ |
| H A D | AVRInstrInfo.h | 108 int64_t BrOffset) const override;
113 int64_t BrOffset, RegScavenger *RS) const override;
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| H A D | AVRInstrInfo.cpp | 543 int64_t BrOffset) const { in isBranchOffsetInRange()
553 return isIntN(13, BrOffset); in isBranchOffsetInRange()
564 return isIntN(7, BrOffset); in isBranchOffsetInRange()
571 const DebugLoc &DL, int64_t BrOffset, in insertIndirectBranch() argument
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCBranchSelector.cpp | 59 unsigned BrOffset);
204 unsigned BrOffset) { in computeBranchSize() argument
212 BranchSize = BrOffset; in computeBranchSize()
228 BranchSize = BlockSizes[StartBlock].first - BrOffset; in computeBranchSize()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 100 int64_t BrOffset, RegScavenger *RS) const override;
111 int64_t BrOffset) const override;
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| H A D | RISCVInstrInfo.cpp | 957 const DebugLoc &DL, int64_t BrOffset, in insertIndirectBranch() argument
967 if (!isInt<32>(BrOffset)) in insertIndirectBranch()
1008 int64_t BrOffset) const { in isBranchOffsetInRange()
1022 return isIntN(13, BrOffset); in isBranchOffsetInRange()
1025 return isIntN(21, BrOffset); in isBranchOffsetInRange()
1027 return isIntN(32, SignExtend64(BrOffset + 0x800, XLen)); in isBranchOffsetInRange()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | BranchRelaxation.cpp | 276 int64_t BrOffset = getInstrOffset(MI); in isBlockInRange() local
279 if (TII->isBranchOffsetInRange(MI.getOpcode(), DestOffset - BrOffset)) in isBlockInRange()
285 << DestOffset << " offset " << DestOffset - BrOffset << '\t' in isBlockInRange()
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYConstantIslandPass.cpp | 1218 unsigned BrOffset = getOffsetOf(MI); in isBBInRange() local
1225 << int(DestOffset - BrOffset) << "\t" << *MI); in isBBInRange()
1227 if (BrOffset <= DestOffset) { in isBBInRange()
1229 if (DestOffset - BrOffset <= MaxDisp) in isBBInRange()
1232 if (BrOffset - DestOffset <= MaxDisp) in isBBInRange()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 586 int64_t BrOffset) const { in isBranchOffsetInRange() argument
602 const DebugLoc &DL, int64_t BrOffset = 0,
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 208 int64_t BrOffset) const override;
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| H A D | AArch64InstrInfo.cpp | 203 int64_t BrOffset) const { in isBranchOffsetInRange()
207 return isIntN(Bits, BrOffset / 4); in isBranchOffsetInRange()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 276 int64_t BrOffset) const override;
283 int64_t BrOffset, RegScavenger *RS) const override;
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| H A D | SIInstrInfo.cpp | 2359 int64_t BrOffset) const { in isBranchOffsetInRange()
2365 BrOffset /= 4; in isBranchOffsetInRange()
2369 BrOffset -= 1; in isBranchOffsetInRange()
2371 return isIntN(BranchOffsetBits, BrOffset); in isBranchOffsetInRange()
2388 const DebugLoc &DL, int64_t BrOffset, in insertIndirectBranch() argument
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