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Searched refs:BaseOp2 (Results 1 – 3 of 3) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp2822 const MachineOperand &BaseOp2 = *BaseOps2.front(); in shouldClusterMemOps() local
2833 if ((BaseOp1.isReg() != BaseOp2.isReg()) || in shouldClusterMemOps()
2834 (BaseOp1.isReg() && BaseOp1.getReg() != BaseOp2.getReg()) || in shouldClusterMemOps()
2835 (BaseOp1.isFI() && BaseOp1.getIndex() != BaseOp2.getIndex())) in shouldClusterMemOps()
2841 const MachineInstr &SecondLdSt = *BaseOp2.getParent(); in shouldClusterMemOps()
2863 assert(Base1 == &BaseOp1 && Base2 == &BaseOp2 && in shouldClusterMemOps()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DMachinePipeliner.cpp774 const MachineOperand *BaseOp1, *BaseOp2; in addLoopCarriedDependences() local
779 TII->getMemOperandWithOffset(MI, BaseOp2, Offset2, in addLoopCarriedDependences()
781 if (BaseOp1->isIdenticalTo(*BaseOp2) && in addLoopCarriedDependences()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp3304 const MachineOperand &BaseOp2 = *BaseOps2.front(); in shouldClusterMemOps() local
3306 const MachineInstr &SecondLdSt = *BaseOp2.getParent(); in shouldClusterMemOps()
3307 if (BaseOp1.getType() != BaseOp2.getType()) in shouldClusterMemOps()
3314 if (BaseOp1.isReg() && BaseOp1.getReg() != BaseOp2.getReg()) in shouldClusterMemOps()
3352 assert((!BaseOp1.isIdenticalTo(BaseOp2) || Offset1 <= Offset2) && in shouldClusterMemOps()
3358 BaseOp2.getIndex(), Offset2, SecondOpc); in shouldClusterMemOps()