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/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Daix-vec-arg-spills.ll14 ; 32BIT-LABEL: caller:
16 ; 32BIT-NEXT: mflr 0
23 ; 32BIT-NEXT: li 6, 512
25 ; 32BIT-NEXT: li 3, 0
76 ; 32BIT-NEXT: nop
79 ; 32BIT-NEXT: mtlr 0
80 ; 32BIT-NEXT: blr
82 ; 64BIT-LABEL: caller:
84 ; 64BIT-NEXT: mflr 0
139 ; 64BIT-NEXT: nop
[all …]
H A Daix-crspill.ll25 ; 64BIT: mflr 0
27 ; 64BIT-NEXT: mfcr 12
37 ; 64BIT-NEXT: mtlr 0
39 ; 64BIT: blr
43 ; 32BIT: mflr 0
45 ; 32BIT-NEXT: mfcr 12
55 ; 32BIT-NEXT: mtlr 0
57 ; 32BIT: blr
65 ; 64BIT-NEXT: mtlr 0
69 ; 64BIT-NEXT: blr
[all …]
H A Dppc-32bit-build-vector.ll9 ; 32BIT-LABEL: BuildVectorICE:
17 ; 32BIT-NEXT: li 7, 0
20 ; 32BIT-NEXT: li 3, 0
22 ; 32BIT-NEXT: .p2align 4
24 ; 32BIT-NEXT: #
35 ; 32BIT-NEXT: b .LBB0_1
39 ; 64BIT-NEXT: li 3, 0
43 ; 64BIT-NEXT: li 3, 0
46 ; 64BIT-NEXT: #
47 ; 64BIT-NEXT: li 4, 0
[all …]
H A Daix-vector-stack-caller.ll22 ; 32BIT-LABEL: vec_caller:
24 ; 32BIT-NEXT: mflr 0
35 ; 32BIT-NEXT: li 3, 48
37 ; 32BIT-NEXT: li 4, 32
48 ; 32BIT-NEXT: nop
51 ; 32BIT-NEXT: mtlr 0
52 ; 32BIT-NEXT: blr
57 ; 64BIT-NEXT: mflr 0
81 ; 64BIT-NEXT: nop
84 ; 64BIT-NEXT: mtlr 0
[all …]
H A Daix-vector-vararg-caller.ll11 ; 32BIT-LABEL: name: caller
12 ; 32BIT: bb.0.entry:
57 ; 32BIT: $r3 = COPY [[LI9]]
58 ; 32BIT: $r5 = COPY [[LWZ5]]
59 ; 32BIT: $r6 = COPY [[LWZ4]]
60 ; 32BIT: $r7 = COPY [[LWZ3]]
61 ; 32BIT: $r8 = COPY [[LWZ2]]
62 ; 32BIT: $r9 = COPY [[LWZ1]]
63 ; 32BIT: $r10 = COPY [[LWZ]]
70 ; 64BIT-LABEL: name: caller
[all …]
H A Daix-cc-byval-mem.ll55 ; 32BIT: fixedStack:
57 ; 32BIT: bb.0.entry:
60 ; 32BIT-NEXT: BLR
62 ; 64BIT: fixedStack:
64 ; 64BIT: bb.0.entry:
67 ; 64BIT-NEXT: BLR8
155 ; 32BIT: fixedStack:
157 ; 32BIT: bb.0.entry:
160 ; 32BIT-NEXT: BLR
167 ; 64BIT-NEXT: BLR8
[all …]
H A Daix-vector-vararg-fixed-caller.ll13 ; 32BIT-LABEL: name: caller
14 ; 32BIT: bb.0.entry:
37 ; 32BIT: $r3 = COPY [[LI1]]
39 ; 32BIT: $f1 = COPY [[LFD]]
40 ; 32BIT: $r9 = COPY [[ORI2]]
42 ; 32BIT: $f2 = COPY [[LFD1]]
47 ; 64BIT-LABEL: name: caller
48 ; 64BIT: bb.0.entry:
76 ; 64BIT: $f1 = COPY [[LFD]]
78 ; 64BIT: $x9 = COPY [[LD1]]
[all …]
H A Daix-cc-abi.ll24 ; 32BIT: $r3 = LI 97
25 ; 32BIT: $r4 = LI 97
26 ; 32BIT: $r5 = LI 97
27 ; 32BIT: $r6 = LI 97
32 ; 64BIT: $x3 = LI8 97
33 ; 64BIT: $x4 = LI8 97
34 ; 64BIT: $x5 = LI8 97
35 ; 64BIT: $x6 = LI8 97
59 ; 32BIT: body:
68 ; 64BIT: body:
[all …]
H A Daix-lr.ll9 ; 32BIT-LABEL: bar:
11 ; 32BIT-NEXT: mflr 0
12 ; 32BIT-NEXT: stw 0, 8(1)
15 ; 32BIT-NEXT: nop
18 ; 32BIT-NEXT: mtlr 0
19 ; 32BIT-NEXT: blr
21 ; 64BIT-LABEL: bar:
23 ; 64BIT-NEXT: mflr 0
27 ; 64BIT-NEXT: nop
30 ; 64BIT-NEXT: mtlr 0
[all …]
H A Daix-fptoint.ll7 ; 32BIT-LABEL: tester_s:
11 ; 32BIT-NEXT: lwz 3, -8(1)
12 ; 32BIT-NEXT: lwz 4, -4(1)
13 ; 32BIT-NEXT: blr
15 ; 64BIT-LABEL: tester_s:
19 ; 64BIT-NEXT: ld 3, -8(1)
20 ; 64BIT-NEXT: blr
28 ; 32BIT-LABEL: tester_u:
34 ; 32BIT-NEXT: blr
36 ; 64BIT-LABEL: tester_u:
[all …]
H A Daix64-cc-abi-vaarg.ll37 ; 64BIT-LABEL: liveins:
47 ; 64BIT-LABEL: fixedStack:
50 ; 64BIT-LABEL: stack:
55 ; 64BIT-DAG: bb.0.entry:
132 ; 64BIT-LABEL: liveins:
142 ; 64BIT-LABEL: fixedStack:
145 ; 64BIT-LABEL: stack:
200 ; 64BIT-LABEL: liveins:
213 ; 64BIT-LABEL: stack:
298 ; 64BIT-LABEL: liveins:
[all …]
H A Dppc64-rop-protection-aix.ll104 ; BE-32BIT-P10-LABEL: caller:
113 ; BE-32BIT-P10-NEXT: nop
120 ; BE-32BIT-P10-NEXT: blr
122 ; BE-32BIT-P9-LABEL: caller:
131 ; BE-32BIT-P9-NEXT: nop
138 ; BE-32BIT-P9-NEXT: blr
140 ; BE-32BIT-P8-LABEL: caller:
149 ; BE-32BIT-P8-NEXT: nop
156 ; BE-32BIT-P8-NEXT: blr
874 ; BE-32BIT-P9-NEXT: nop
[all …]
H A Dtest_func_desc.ll32 ; 32BIT: .csect foo[DS],2
33 ; 32BIT-NEXT: .vbyte 4, .foo
35 ; 32BIT-NEXT: .vbyte 4, 0
36 ; 64BIT: .csect foo[DS],3
39 ; 64BIT-NEXT: .vbyte 8, 0
45 ; 32BIT: .csect main[DS],2
48 ; 32BIT-NEXT: .vbyte 4, 0
49 ; 64BIT: .csect main[DS],3
52 ; 64BIT-NEXT: .vbyte 8, 0
64 ; 32BIT-NEXT: .vbyte 4, 0
[all …]
H A Daix-base-pointer.ll22 ; 32BIT-LABEL: .caller:
23 ; 32BIT: stw 30, -16(1)
24 ; 32BIT: mr 30, 1
27 ; 32BIT: stwux 1, 1, 0
28 ; 32BIT: addi 3, 1, 64
29 ; 32BIT: bl .callee
30 ; 32BIT: mr 1, 30
33 ; 64BIT-LABEL: .caller:
35 ; 64BIT: mr 30, 1
40 ; 64BIT: bl .callee
[all …]
H A Daix-cc-byval.ll75 ; 32BIT: fixedStack:
81 ; 32BIT: bb.0.entry:
85 ; 32BIT-NEXT: BLR
87 ; 64BIT: fixedStack:
93 ; 64BIT: bb.0.entry:
423 ; 32BIT: BLR
441 ; 64BIT-NEXT: BLR8
766 ; 32BIT: BLR
779 ; 64BIT-NEXT: BLR8
905 ; 32BIT-NEXT: BLR
[all …]
H A Daix32-cc-abi-vaarg.ll57 ; 32BIT-LABEL: liveins:
67 ; 32BIT-LABEL: fixedStack:
70 ; 32BIT-LABEL: stack:
157 ; 32BIT-LABEL: liveins:
167 ; 32BIT-LABEL: fixedStack:
170 ; 32BIT-LABEL: stack:
243 ; 32BIT-LABEL: liveins:
252 ; 32BIT-LABEL: fixedStack:
255 ; 32BIT-LABEL: stack:
337 ; 32BIT-LABEL: liveins:
[all …]
H A Dppc-32bit-shift.ll9 ; 32BIT-LABEL: foo:
10 ; 32BIT: # %bb.0: # %entry
11 ; 32BIT-NEXT: srawi 5, 3, 31
12 ; 32BIT-NEXT: rotlwi 6, 3, 8
13 ; 32BIT-NEXT: slwi 3, 3, 8
15 ; 32BIT-NEXT: stw 3, 4(4)
16 ; 32BIT-NEXT: stw 6, 0(4)
17 ; 32BIT-NEXT: blr
19 ; 64BIT-LABEL: foo:
22 ; 64BIT-NEXT: std 3, 0(4)
[all …]
H A Dbuiltins-ppc-xlcompat-move-tofrom-regs.ll24 ; CHECK-32BIT-LABEL: test_mftbu:
26 ; CHECK-32BIT-NEXT: mftbu 3
27 ; CHECK-32BIT-NEXT: blr
40 ; CHECK-32BIT-LABEL: test_mfmsr:
42 ; CHECK-32BIT-NEXT: mfmsr 4
43 ; CHECK-32BIT-NEXT: li 3, 0
44 ; CHECK-32BIT-NEXT: blr
56 ; CHECK-32BIT-LABEL: test_mtmsr:
59 ; CHECK-32BIT-NEXT: lwz 3, 4(3)
60 ; CHECK-32BIT-NEXT: mtmsr 3, 0
[all …]
H A Dtest_call_aix.ll2 ; RUN: FileCheck --check-prefix=32BIT %s
5 ; RUN: FileCheck --check-prefix=64BIT %s
14 ; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
15 ; 32BIT: BL_NOP <mcsymbol .foo[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r2, …
16 ; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
18 ; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
20 ; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
37 ; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
39 ; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
41 ; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
[all …]
H A Dppc64-rop-protection.ll243 ; BE-32BIT-P10-LABEL: caller:
258 ; BE-32BIT-P10-NEXT: blr
260 ; BE-32BIT-P9-LABEL: caller:
275 ; BE-32BIT-P9-NEXT: blr
277 ; BE-32BIT-P8-LABEL: caller:
292 ; BE-32BIT-P8-NEXT: blr
1819 ; BE-32BIT-P9-NEXT: nop
1882 ; BE-32BIT-P9-NEXT: blr
1956 ; BE-32BIT-P8-NEXT: nop
2031 ; BE-32BIT-P8-NEXT: blr
[all …]
/llvm-project-15.0.7/lldb/test/Shell/BuildScript/
H A Dtoolchain-msvc.test10 32BIT: Arch: 32
11 32BIT: Compiler: msvc
15 32BIT: Opt: none
16 32BIT: Mode: compile
17 32BIT: Clean: True
18 32BIT: Verbose: True
19 32BIT: Dryrun: True
29 32BIT: Env
38 64BIT: Arch: 64
43 64BIT: Opt: none
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dcsr-split.ll31 ; CHECK-32BIT-LABEL: test1:
36 ; CHECK-32BIT-NEXT: cmpl %eax, a
37 ; CHECK-32BIT-NEXT: je .LBB0_2
41 ; CHECK-32BIT-NEXT: retl
95 ; CHECK-32BIT-LABEL: test2:
101 ; CHECK-32BIT-NEXT: je .LBB1_2
104 ; CHECK-32BIT-NEXT: je .LBB1_3
109 ; CHECK-32BIT-NEXT: retl
168 ; CHECK-32BIT-LABEL: test3:
198 ; CHECK-32BIT-NEXT: popl %esi
[all …]
/llvm-project-15.0.7/llvm/test/MC/Mips/
H A Dmips-expansions-bad.s2 # RUN: FileCheck %s < %t1 --check-prefix=32-BIT
4 # RUN: FileCheck %s --check-prefix=64-BIT
6 # RUN: FileCheck %s --check-prefix=64-BIT
10 # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 64-bit architecture
12 # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate
14 # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate
17 # 32-BIT: :[[@LINE-1]]:3: error: instruction not supported on mips32r6 or mips64r6
18 # 64-BIT: :[[@LINE-2]]:3: error: instruction not supported on mips32r6 or mips64r6
20 # 32-BIT: :[[@LINE-1]]:3: error: instruction not supported on mips32r6 or mips64r6
21 # 64-BIT: :[[@LINE-2]]:3: error: instruction not supported on mips32r6 or mips64r6
[all …]
/llvm-project-15.0.7/lldb/test/Shell/SymbolFile/PDB/
H A Dcalling-conventions-x86.test7 64BIT-CHECK: Module: {{.*}}
8 64BIT-CHECK-DAG: int (*FuncCCallPtr)();
9 64BIT-CHECK-DAG: int (*FuncStdCallPtr)();
10 64BIT-CHECK-DAG: int (*FuncFastCallPtr)();
11 64BIT-CHECK-DAG: int (*FuncVectorCallPtr)() __attribute__((vectorcall));
12 64BIT-CHECK-DAG: int (S::*FuncThisCallPtr)();
14 32BIT-CHECK: Module: {{.*}}
15 32BIT-CHECK-DAG: int (*FuncCCallPtr)();
16 32BIT-CHECK-DAG: int (*FuncStdCallPtr)() __attribute__((stdcall));
17 32BIT-CHECK-DAG: int (*FuncFastCallPtr)() __attribute__((fastcall));
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dinlineasm-constraint-ZC-1.ll75 ; 09BIT: lw $1, 0($[[BASEPTR2]])
76 ; 12BIT: lw $1, 256($[[BASEPTR]])
77 ; 16BIT: lw $1, 256($[[BASEPTR]])
96 ; 09BIT: lw $1, 0($[[BASEPTR2]])
97 ; 12BIT: lw $1, 2044($[[BASEPTR]])
98 ; 16BIT: lw $1, 2044($[[BASEPTR]])
118 ; 09BIT: lw $1, 0($[[BASEPTR2]])
119 ; 12BIT: lw $1, 0($[[BASEPTR2]])
120 ; 16BIT: lw $1, 2048($[[BASEPTR]])
140 ; 09BIT: lw $1, 0($[[BASEPTR2]])
[all …]

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