Lines Matching refs:BIT

1 …lc -march=mipsel -mcpu=mips32r6 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,09BIT
2 …-march=mipsel -mattr=+micromips -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,12BIT
3 ; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,16BIT
71   ; 09BIT: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 256
75   ; 09BIT: lw $1, 0($[[BASEPTR2]])
76   ; 12BIT: lw $1, 256($[[BASEPTR]])
77   ; 16BIT: lw $1, 256($[[BASEPTR]])
92   ; 09BIT: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 2044
96   ; 09BIT: lw $1, 0($[[BASEPTR2]])
97   ; 12BIT: lw $1, 2044($[[BASEPTR]])
98   ; 16BIT: lw $1, 2044($[[BASEPTR]])
113   ; 09BIT: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 2048
114   ; 12BIT: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 2048
118   ; 09BIT: lw $1, 0($[[BASEPTR2]])
119   ; 12BIT: lw $1, 0($[[BASEPTR2]])
120   ; 16BIT: lw $1, 2048($[[BASEPTR]])
135   ; 09BIT: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 32764
136   ; 12BIT: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 32764
140   ; 09BIT: lw $1, 0($[[BASEPTR2]])
141   ; 12BIT: lw $1, 0($[[BASEPTR2]])
142   ; 16BIT: lw $1, 32764($[[BASEPTR]])
158   ; 09BIT: addu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], $[[T0]]
159   ; 12BIT: addu16 $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], $[[T0]]
160   ; 16BIT: addu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], $[[T0]]