| /llvm-project-15.0.7/llvm/test/tools/gold/X86/v1.12/ |
| H A D | thinlto_emit_linked_objects.ll | 43 ; RUN: llvm-bcanalyzer --dump %t2.o.thinlto.bc | FileCheck %s -check-prefixes=CHECK-BC2 44 ; CHECK-BC2: <GLOBALVAL_SUMMARY_BLOCK 45 ; CHECK-BC2: <FLAGS op0=2/> 46 ; CHECK-BC2: </GLOBALVAL_SUMMARY_BLOCK
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| /llvm-project-15.0.7/llvm/test/Transforms/VectorCombine/X86/ |
| H A D | shuffle-inseltpoison.ll | 98 ; SSE-NEXT: [[BC2:%.*]] = bitcast <16 x i8> [[ADD]] to <4 x i32> 99 ; SSE-NEXT: [[PERMIL1:%.*]] = shufflevector <4 x i32> [[BC2]], <4 x i32> poison, <4 x i32> <i32 … 108 ; AVX-NEXT: [[BC2:%.*]] = bitcast <16 x i8> [[ADD]] to <4 x i32> 109 ; AVX-NEXT: [[PERMIL1:%.*]] = shufflevector <4 x i32> [[BC2]], <4 x i32> poison, <4 x i32> <i32 … 129 ; SSE-NEXT: [[BC2:%.*]] = bitcast <8 x i16> [[ADD]] to <4 x i32> 130 ; SSE-NEXT: [[PERMIL1:%.*]] = shufflevector <4 x i32> [[BC2]], <4 x i32> poison, <4 x i32> <i32 … 139 ; AVX-NEXT: [[BC2:%.*]] = bitcast <8 x i16> [[ADD]] to <4 x i32> 140 ; AVX-NEXT: [[PERMIL1:%.*]] = shufflevector <4 x i32> [[BC2]], <4 x i32> poison, <4 x i32> <i32 …
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| H A D | shuffle.ll | 98 ; SSE-NEXT: [[BC2:%.*]] = bitcast <16 x i8> [[ADD]] to <4 x i32> 99 ; SSE-NEXT: [[PERMIL1:%.*]] = shufflevector <4 x i32> [[BC2]], <4 x i32> poison, <4 x i32> <i32 … 108 ; AVX-NEXT: [[BC2:%.*]] = bitcast <16 x i8> [[ADD]] to <4 x i32> 109 ; AVX-NEXT: [[PERMIL1:%.*]] = shufflevector <4 x i32> [[BC2]], <4 x i32> poison, <4 x i32> <i32 … 129 ; SSE-NEXT: [[BC2:%.*]] = bitcast <8 x i16> [[ADD]] to <4 x i32> 130 ; SSE-NEXT: [[PERMIL1:%.*]] = shufflevector <4 x i32> [[BC2]], <4 x i32> poison, <4 x i32> <i32 … 139 ; AVX-NEXT: [[BC2:%.*]] = bitcast <8 x i16> [[ADD]] to <4 x i32> 140 ; AVX-NEXT: [[PERMIL1:%.*]] = shufflevector <4 x i32> [[BC2]], <4 x i32> poison, <4 x i32> <i32 …
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| /llvm-project-15.0.7/llvm/test/tools/gold/X86/ |
| H A D | thinlto-emit-llvm.ll | 5 ; RUN: llvm-dis %t.bc2 -o - | FileCheck --check-prefix=CHECK-BC2 %s 14 ; CHECK-BC2: define dso_local i32 @_Z3barv()
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| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | backchain.ll | 68 ; CHECK-DAG: lg [[BC2:%r[0-9]+]], 0(%r15) 70 ; CHECK-DAG: stg [[BC2]], 0([[SAVESP]]) 99 ; CHECK-DAG: lg [[BC2:%r[0-9]+]], 152(%r15) 101 ; CHECK-DAG: stg [[BC2]], 152([[SAVESP]])
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| /llvm-project-15.0.7/llvm/tools/llvm-cov/ |
| H A D | CoverageExporterLcov.cpp | 144 unsigned BC2 = NextBranch->FalseExecutionCount; in renderBranchExecutionCounts() local 145 bool BranchNotExecuted = (BC1 == 0 && BC2 == 0); in renderBranchExecutionCounts() 153 OS << ',' << (I == 0 ? BC1 : BC2) << '\n'; in renderBranchExecutionCounts()
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| /llvm-project-15.0.7/llvm/test/Transforms/InstCombine/ |
| H A D | bitcast.ll | 182 ; CHECK-NEXT: [[BC2:%.*]] = bitcast <8 x i16> [[B:%.*]] to <2 x i64> 183 ; CHECK-NEXT: call void @use_vec(<2 x i64> [[BC2]]) 184 ; CHECK-NEXT: [[AND:%.*]] = and <2 x i64> [[BC2]], [[BC1]] 202 ; CHECK-NEXT: [[BC2:%.*]] = bitcast <2 x i64> [[OR]] to i128 203 ; CHECK-NEXT: ret i128 [[BC2]] 217 ; CHECK-NEXT: [[BC2:%.*]] = bitcast i128 [[XOR]] to <4 x i32> 218 ; CHECK-NEXT: ret <4 x i32> [[BC2]] 383 ; CHECK-NEXT: ret float [[BC2]] 396 ; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x i64> [[BC]], i64 1 397 ; CHECK-NEXT: ret i64 [[BC2]] [all …]
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| H A D | bitcast-inseltpoison.ll | 153 ; CHECK-NEXT: [[BC2:%.*]] = bitcast <2 x i64> [[OR]] to i128 154 ; CHECK-NEXT: ret i128 [[BC2]] 168 ; CHECK-NEXT: [[BC2:%.*]] = bitcast i128 [[XOR]] to <4 x i32> 169 ; CHECK-NEXT: ret <4 x i32> [[BC2]] 310 ; CHECK-NEXT: [[BC2:%.*]] = bitcast <2 x i64> [[B:%.*]] to <4 x float> 311 ; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[BC2]], i64 2 334 ; CHECK-NEXT: ret float [[BC2]] 347 ; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x i64> [[BC]], i64 1 348 ; CHECK-NEXT: ret i64 [[BC2]] 371 ; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x double> [[BC]], i64 0 [all …]
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| H A D | bitcast-bigendian.ll | 33 ; CHECK-NEXT: [[BC2:%.*]] = bitcast <2 x i64> [[B:%.*]] to <4 x float> 34 ; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[BC2]], i64 1
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| H A D | logical-select-inseltpoison.ll | 348 ; CHECK-NEXT: [[BC2:%.*]] = xor <2 x i64> [[TMP1]], <i64 -1, i64 -1> 349 ; CHECK-NEXT: [[AND2:%.*]] = and <2 x i64> [[BC2]], [[B:%.*]] 351 ; CHECK-NEXT: [[ADD:%.*]] = add <2 x i64> [[AND2]], [[BC2]] 625 ; CHECK-NEXT: [[BC2:%.*]] = bitcast <2 x double> [[B]] to <2 x i64> 626 ; CHECK-NEXT: [[AND2:%.*]] = and <2 x i64> [[SIB]], [[BC2]]
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| H A D | logical-select.ll | 349 ; CHECK-NEXT: [[BC2:%.*]] = xor <2 x i64> [[TMP1]], <i64 -1, i64 -1> 350 ; CHECK-NEXT: [[AND2:%.*]] = and <2 x i64> [[BC2]], [[B:%.*]] 352 ; CHECK-NEXT: [[ADD:%.*]] = add <2 x i64> [[AND2]], [[BC2]] 657 ; CHECK-NEXT: [[BC2:%.*]] = bitcast <2 x double> [[B]] to <2 x i64> 658 ; CHECK-NEXT: [[AND2:%.*]] = and <2 x i64> [[SIB]], [[BC2]]
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| H A D | select.ll | 742 ; CHECK-NEXT: [[BC2:%.*]] = select <vscale x 4 x i1> [[ICMP:%.*]], <vscale x 4 x float> [[B:%.*]… 743 ; CHECK-NEXT: ret <vscale x 4 x float> [[BC2]] 818 ; CHECK-NEXT: [[BC2:%.*]] = trunc <4 x i64> [[B:%.*]] to <4 x i32> 819 ; CHECK-NEXT: [[SEL1:%.*]] = select <4 x i1> [[CMP]], <4 x i32> [[BC1]], <4 x i32> [[BC2]] 820 ; CHECK-NEXT: [[SEL2:%.*]] = select <4 x i1> [[CMP]], <4 x i32> [[BC2]], <4 x i32> [[BC1]]
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| /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/ |
| H A D | reduction-odd-interleave-counts.ll | 23 ; UF3-NEXT: [[BC2:%.+]] = bitcast i32* [[L_GEP2]] to <4 x i32>* 24 ; UF3-NEXT: [[L2:%.+]] = load <4 x i32>, <4 x i32>* [[BC2]], align 4 62 ; UF5-NEXT: [[BC2:%.+]] = bitcast i32* [[L_GEP2]] to <4 x i32>* 63 ; UF5-NEXT: [[L2:%.+]] = load <4 x i32>, <4 x i32>* [[BC2]], align 4
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| /llvm-project-15.0.7/llvm/test/Transforms/WholeProgramDevirt/ |
| H A D | expand-check.ll | 50 ; CHECK: [[BC2:%[^ ]*]] = bitcast i8* [[GEP2]] to i8** 51 ; CHECK: [[LOAD2:%[^ ]*]] = load i8*, i8** [[BC2]]
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| /llvm-project-15.0.7/llvm/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | const-hoist-gep.ll | 12 ; CHECK-NEXT: %[[BC2:[a-z0-9_]+]] = bitcast i8* %[[M1]] to i32* 13 ; CHECK-NEXT: store i32 undef, i32* %[[BC2]], align 4
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| /llvm-project-15.0.7/llvm/test/Transforms/ConstantHoisting/ARM/ |
| H A D | const-hoist-gep.ll | 14 ; CHECK-NEXT: %[[BC2:[a-z0-9_]+]] = bitcast i8* %[[M1]] to i32* 15 ; CHECK-NEXT: store i32 undef, i32* %[[BC2]], align 4
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| /llvm-project-15.0.7/clang/test/Driver/ |
| H A D | hip-binding.hip | 21 // RDCS: # "amdgcn-amd-amdhsa" - "clang", inputs: ["[[IN:.*hip-binding.hip]]"], output: "[[BC2:.*bc… 23 // RDCS: # "x86_64-unknown-linux-gnu" - "offload bundler", inputs: ["[[BC1]]", "[[BC2]]", "[[HOSTOB…
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| /llvm-project-15.0.7/llvm/test/Transforms/LICM/ |
| H A D | funclet.ll | 98 ; CHECK-NEXT: [[BC2:%.*]] = bitcast i8* [[DOTFRAME2]] to i32* 102 ; CHECK-NEXT: store i32 2, i32* [[BC2]], align 4
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| /llvm-project-15.0.7/llvm/test/Transforms/DeadStoreElimination/ |
| H A D | multiblock-loops.ll | 816 ; CHECK-NEXT: [[BC2:%.*]] = getelementptr inbounds i8, i8* [[BC]], i32 1 818 ; CHECK-NEXT: store i8 11, i8* [[BC2]], align 1 868 ; CHECK-NEXT: [[BC2:%.*]] = getelementptr inbounds i8, i8* [[BC]], i32 1 870 ; CHECK-NEXT: store i8 11, i8* [[BC2]], align 1 911 ; CHECK-NEXT: [[BC2:%.*]] = getelementptr inbounds i8, i8* [[BC]], i32 1 912 ; CHECK-NEXT: store i8 11, i8* [[BC2]], align 1
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| /llvm-project-15.0.7/llvm/test/Transforms/LowerMatrixIntrinsics/ |
| H A D | multiply-fused-multiple-blocks.ll | 54 ; CHECK-NEXT: [[BC2:%.+]] = bitcast [6 x double]* [[TMP8]] to <6 x double>* 60 …*]] = phi <6 x double>* [ [[B]], [[NO_ALIAS]] ], [ [[B]], [[ALIAS_CONT1]] ], [ [[BC2]], [[COPY2]] ]
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| /llvm-project-15.0.7/polly/lib/External/isl/imath/tests/ |
| H A D | qtodec.tc | 655 qtodec:-1329127236657015/571179194743,14,21,0:-BC2.DB9808DAB68A65CB41223
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| /llvm-project-15.0.7/llvm/test/Transforms/Attributor/ |
| H A D | nocapture-2.ll | 312 ; CHECK-NEXT: [[BC2:%.*]] = bitcast float* [[CALL]] to i8* 313 ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8* [[BC2]], null
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| H A D | returned.ll | 917 ; CHECK-NEXT: [[BC2:%.*]] = bitcast double* [[PHI]] to i8* 920 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP2]], i8* [[BC2]], i8* [[BC3]]
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 6936 Value *BC2 = Builder.CreateBitCast(Shuffle, SVIVecType); in optimizeShuffleVectorInst() local 6938 SVI->replaceAllUsesWith(BC2); in optimizeShuffleVectorInst()
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| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCompares.cpp | 3047 if (auto *BC2 = dyn_cast<BitCastInst>(Op1)) in foldICmpBitCast() local 3048 Op1 = BC2->getOperand(0); in foldICmpBitCast()
|