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Searched refs:ArgFlags (Results 1 – 25 of 32) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86CallingConv.cpp132 if (ArgFlags.isSecArgPass()) { in CC_X86_64_VectorCall()
133 if (ArgFlags.isHva()) in CC_X86_64_VectorCall()
155 if (!ArgFlags.isHva() || ArgFlags.isHvaStart()) { in CC_X86_64_VectorCall()
171 if (!ArgFlags.isHva()) { in CC_X86_64_VectorCall()
180 return ArgFlags.isHva(); in CC_X86_64_VectorCall()
192 if (ArgFlags.isSecArgPass()) { in CC_X86_32_VectorCall()
193 if (ArgFlags.isHva()) in CC_X86_32_VectorCall()
207 if (ArgFlags.isHva()) in CC_X86_32_VectorCall()
222 ArgFlags.setInReg(); in CC_X86_32_VectorCall()
254 if (!ArgFlags.isSplitEnd()) in CC_X86_32_MCUInReg()
[all …]
H A DX86CallingConv.h24 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
28 ISD::ArgFlagsTy ArgFlags, CCState &State);
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMCallingConv.h21 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
24 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
27 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
30 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
33 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
37 ISD::ArgFlagsTy ArgFlags, CCState &State);
39 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
42 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
45 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
48 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
H A DARMCallingConv.cpp51 ISD::ArgFlagsTy ArgFlags, in CC_ARM_APCS_Custom_f64() argument
104 ISD::ArgFlagsTy ArgFlags, in CC_ARM_AAPCS_Custom_f64() argument
136 ISD::ArgFlagsTy ArgFlags, in RetCC_ARM_APCS_Custom_f64() argument
147 ISD::ArgFlagsTy ArgFlags, in RetCC_ARM_AAPCS_Custom_f64() argument
149 return RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, in RetCC_ARM_AAPCS_Custom_f64()
172 ISD::ArgFlagsTy ArgFlags, in CC_ARM_AAPCS_Custom_Aggregate() argument
185 ValNo, ValVT, LocVT, LocInfo, ArgFlags.getNonZeroOrigAlign().value())); in CC_ARM_AAPCS_Custom_Aggregate()
187 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_ARM_AAPCS_Custom_Aggregate()
269 Alignment = ArgFlags.getNonZeroMemAlign() <= 4 ? Align(4) : Align(8); in CC_ARM_AAPCS_Custom_Aggregate()
300 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_ARM_AAPCS_Custom_f16() argument
[all …]
H A DARMFastISel.cpp219 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
1878 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in ProcessCallArgs() argument
1885 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, in ProcessCallArgs()
2226 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in ARMEmitLibcall() local
2230 ArgFlags.reserve(I->getNumOperands()); in ARMEmitLibcall()
2245 ArgFlags.push_back(Flags); in ARMEmitLibcall()
2251 if (!ProcessCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in ARMEmitLibcall()
2335 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in SelectCall() local
2340 ArgFlags.reserve(arg_size); in SelectCall()
2378 ArgFlags.push_back(Flags); in SelectCall()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.h20 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
24 ISD::ArgFlagsTy ArgFlags, CCState &State);
27 ISD::ArgFlagsTy ArgFlags, CCState &State);
30 ISD::ArgFlagsTy ArgFlags, CCState &State);
33 ISD::ArgFlagsTy ArgFlags, CCState &State);
36 ISD::ArgFlagsTy ArgFlags, CCState &State);
39 ISD::ArgFlagsTy ArgFlags, CCState &State);
41 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
44 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
48 ISD::ArgFlagsTy ArgFlags, CCState &State);
H A DAArch64CallingConvention.cpp43 MVT LocVT, ISD::ArgFlagsTy &ArgFlags, in finishStackBlock() argument
53 ArgFlags.setInConsecutiveRegs(false); in finishStackBlock()
54 ArgFlags.setInConsecutiveRegsLast(false); in finishStackBlock()
72 ArgFlags, State)) in finishStackBlock()
76 ArgFlags.setInConsecutiveRegs(true); in finishStackBlock()
77 ArgFlags.setInConsecutiveRegsLast(true); in finishStackBlock()
106 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Stack_Block() argument
114 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_AArch64_Custom_Stack_Block()
117 return finishStackBlock(PendingMembers, LocVT, ArgFlags, State, Align(8)); in CC_AArch64_Custom_Stack_Block()
157 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_AArch64_Custom_Block()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.h23 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
26 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
29 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
32 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
35 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
38 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
42 ISD::ArgFlagsTy ArgFlags, CCState &State);
H A DPPCCallingConv.cpp26 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_Dummy() argument
34 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignArgRegs() argument
60 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() argument
84 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignFPArgRegs() argument
112 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SPE_CustomSplitFP64() argument
141 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SPE_RetF64() argument
H A DPPCFastISel.cpp187 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
1377 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in processCallArgs() argument
1389 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_PPC64_ELF_FIS); in processCallArgs()
1605 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in fastLowerCall() local
1610 ArgFlags.reserve(NumArgs); in fastLowerCall()
1639 ArgFlags.push_back(Flags); in fastLowerCall()
1646 if (!processCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in fastLowerCall()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DCallingConvLower.cpp45 Align Alignment = ArgFlags.getNonZeroByValAlign(); in HandleByVal()
46 unsigned Size = ArgFlags.getByValSize(); in HandleByVal()
88 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments() local
89 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) in AnalyzeFormalArguments()
101 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn() local
102 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) in CheckReturn()
115 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn() local
116 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) in AnalyzeReturn()
128 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeCallOperands() local
129 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeCallOperands()
[all …]
/llvm-project-15.0.7/llvm/include/llvm/Target/
H A DTargetCallingConv.td41 class CCIfByVal<CCAction A> : CCIf<"ArgFlags.isByVal()", A> {
46 class CCIfPreallocated<CCAction A> : CCIf<"ArgFlags.isPreallocated()", A> {
51 class CCIfSwiftSelf<CCAction A> : CCIf<"ArgFlags.isSwiftSelf()", A> {
56 class CCIfSwiftAsync<CCAction A> : CCIf<"ArgFlags.isSwiftAsync()", A> {
61 class CCIfSwiftError<CCAction A> : CCIf<"ArgFlags.isSwiftError()", A> {
80 class CCIfInReg<CCAction A> : CCIf<"ArgFlags.isInReg()", A> {}
84 class CCIfNest<CCAction A> : CCIf<"ArgFlags.isNest()", A> {}
88 class CCIfSplit<CCAction A> : CCIf<"ArgFlags.isSplit()", A> {}
92 class CCIfSRet<CCAction A> : CCIf<"ArgFlags.isSRet()", A> {}
103 : CCIf<"(ArgFlags.isPointer() && ArgFlags.getPointerAddrSpace() == " # AS # ")", A> {}
[all …]
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h97 ISD::ArgFlagsTy &ArgFlags, in CC_SystemZ_I128Indirect() argument
103 if (!ArgFlags.isSplit() && PendingMembers.empty()) in CC_SystemZ_I128Indirect()
111 if (!ArgFlags.isSplitEnd()) in CC_SystemZ_I128Indirect()
147 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_XPLINK64_Shadow_Reg() argument
170 ISD::ArgFlagsTy &ArgFlags, in CC_XPLINK64_Allocate128BitVararg() argument
H A DSystemZCallingConv.td12 : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYCallingConv.h27 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_CSKY_ABIV2_SOFT_64() argument
46 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in Ret_CSKY_ABIV2_SOFT_64() argument
/llvm-project-15.0.7/clang/include/clang/Basic/
H A DIdentifierTable.h763 ArgFlags = 0x07 enumerator
774 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); in Selector()
781 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); in Selector()
787 return reinterpret_cast<IdentifierInfo *>(InfoPtr & ~ArgFlags); in getAsIdentifierInfo()
792 return reinterpret_cast<MultiKeywordSelector *>(InfoPtr & ~ArgFlags); in getMultiKeywordSelector()
796 return InfoPtr & ArgFlags; in getIdentifierInfoFlag()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h177 ISD::ArgFlagsTy ArgFlags, CCState &State);
184 ISD::ArgFlagsTy &ArgFlags, CCState &State);
448 ISD::ArgFlagsTy ArgFlags);
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kCallingConv.h40 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_M68k_Any_AssignToReg() argument
/llvm-project-15.0.7/clang-tools-extra/clang-tidy/readability/
H A DSuspiciousCallArgumentCheck.cpp219 SmallVector<int, SmallVectorSize> ArgFlags(ArgLen); in applyJaroWinklerHeuristic() local
229 if (tolower(Param[I]) == tolower(Arg[J]) && !ArgFlags[J]) { in applyJaroWinklerHeuristic()
230 ArgFlags[J] = 1; in applyJaroWinklerHeuristic()
245 if (ArgFlags[J] == 1) { in applyJaroWinklerHeuristic()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallingConv.td14 class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {}
16 : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp499 ISD::ArgFlagsTy ArgFlags = Args[ValNo].Flags; in AnalyzeArguments() local
506 if (ArgFlags.isSExt()) in AnalyzeArguments()
508 else if (ArgFlags.isZExt()) in AnalyzeArguments()
515 if (ArgFlags.isByVal()) { in AnalyzeArguments()
516 State.HandleByVal(ValNo++, ArgVT, LocVT, LocInfo, 2, Align(2), ArgFlags); in AnalyzeArguments()
534 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments()
544 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp43 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_SRet() argument
45 assert (ArgFlags.isSRet()); in CC_Sparc_Assign_SRet()
56 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_Split_64() argument
106 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in Analyze_CC_Sparc64_Full() argument
193 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Full() argument
194 return Analyze_CC_Sparc64_Full(false, ValNo, ValVT, LocVT, LocInfo, ArgFlags, in CC_Sparc64_Full()
200 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Half() argument
207 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in RetCC_Sparc64_Full() argument
208 return Analyze_CC_Sparc64_Full(true, ValNo, ValVT, LocVT, LocInfo, ArgFlags, in RetCC_Sparc64_Full()
214 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in RetCC_Sparc64_Half() argument
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonCallingConv.td91 // without any additional information (in ArgFlags) stating that
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp2879 if (ArgFlags.isByVal()) in CC_MipsO32()
2883 if (ArgFlags.isInReg() && !Subtarget.isLittle()) { in CC_MipsO32()
2886 if (ArgFlags.isSExt()) in CC_MipsO32()
2888 else if (ArgFlags.isZExt()) in CC_MipsO32()
2898 if (ArgFlags.isSExt()) in CC_MipsO32()
2900 else if (ArgFlags.isZExt()) in CC_MipsO32()
2913 Align OrigAlign = ArgFlags.getNonZeroOrigAlign(); in CC_MipsO32()
2923 if (ArgFlags.isSplit()) { in CC_MipsO32()
2988 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32() argument
2991 return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, F64Regs); in CC_MipsO32_FP32()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp367 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Lanai32_VarArg() argument
372 return CC_Lanai32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State); in CC_Lanai32_VarArg()
378 if (ArgFlags.isSExt()) in CC_Lanai32_VarArg()
380 else if (ArgFlags.isZExt()) in CC_Lanai32_VarArg()

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