Searched refs:ArgDescriptor (Results 1 – 12 of 12) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUArgumentUsageInfo.h | 23 struct ArgDescriptor { struct 54 static constexpr ArgDescriptor createArg(const ArgDescriptor &Arg, in createArg() argument 126 ArgDescriptor DispatchPtr; 127 ArgDescriptor QueuePtr; 129 ArgDescriptor DispatchID; 132 ArgDescriptor LDSKernelId; 135 ArgDescriptor WorkGroupIDX; 136 ArgDescriptor WorkGroupIDY; 150 ArgDescriptor WorkItemIDX; 151 ArgDescriptor WorkItemIDY; [all …]
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| H A D | AMDGPUArgumentUsageInfo.cpp | 26 void ArgDescriptor::print(raw_ostream &OS, in print() 89 std::tuple<const ArgDescriptor *, const TargetRegisterClass *, LLT> 156 = ArgDescriptor::createRegister(AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3); in fixedABILayout() 157 AI.DispatchPtr = ArgDescriptor::createRegister(AMDGPU::SGPR4_SGPR5); in fixedABILayout() 158 AI.QueuePtr = ArgDescriptor::createRegister(AMDGPU::SGPR6_SGPR7); in fixedABILayout() 163 AI.DispatchID = ArgDescriptor::createRegister(AMDGPU::SGPR10_SGPR11); in fixedABILayout() 166 AI.WorkGroupIDX = ArgDescriptor::createRegister(AMDGPU::SGPR12); in fixedABILayout() 167 AI.WorkGroupIDY = ArgDescriptor::createRegister(AMDGPU::SGPR13); in fixedABILayout() 168 AI.WorkGroupIDZ = ArgDescriptor::createRegister(AMDGPU::SGPR14); in fixedABILayout() 169 AI.LDSKernelId = ArgDescriptor::createRegister(AMDGPU::SGPR15); in fixedABILayout() [all …]
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| H A D | SIMachineFunctionInfo.cpp | 96 ArgDescriptor::createRegister(ScratchRSrcReg); in SIMachineFunctionInfo() 179 ArgDescriptor::createRegister(AMDGPU::SGPR5); in SIMachineFunctionInfo() 219 ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addPrivateSegmentBuffer() 226 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchPtr() 233 ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addQueuePtr() 241 = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addKernargSegmentPtr() 248 ArgInfo.DispatchID = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchID() 255 ArgInfo.FlatScratchInit = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addFlatScratchInit() 262 ArgInfo.ImplicitBufferPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addImplicitBufferPtr() 269 ArgInfo.LDSKernelId = ArgDescriptor::createRegister(getNextUserSGPR()); in addLDSKernelId() [all …]
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| H A D | SIMachineFunctionInfo.h | 625 ArgInfo.WorkGroupIDX = ArgDescriptor::createRegister(getNextSystemSGPR()); 631 ArgInfo.WorkGroupIDY = ArgDescriptor::createRegister(getNextSystemSGPR()); 637 ArgInfo.WorkGroupIDZ = ArgDescriptor::createRegister(getNextSystemSGPR()); 643 ArgInfo.WorkGroupInfo = ArgDescriptor::createRegister(getNextSystemSGPR()); 649 void setWorkItemIDX(ArgDescriptor Arg) { 653 void setWorkItemIDY(ArgDescriptor Arg) { 657 void setWorkItemIDZ(ArgDescriptor Arg) { 663 = ArgDescriptor::createRegister(getNextSystemSGPR()); 669 ArgInfo.PrivateSegmentWaveByteOffset = ArgDescriptor::createRegister(Reg); 746 std::tuple<const ArgDescriptor *, const TargetRegisterClass *, LLT>
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| H A D | AMDGPUCallLowering.cpp | 790 const ArgDescriptor *OutgoingArg; in passSpecialInputs() 803 const ArgDescriptor *IncomingArg; in passSpecialInputs() 841 const ArgDescriptor *OutgoingArg; in passSpecialInputs() 863 const ArgDescriptor *IncomingArgX = std::get<0>(WorkitemIDX); in passSpecialInputs() 864 const ArgDescriptor *IncomingArgY = std::get<0>(WorkitemIDY); in passSpecialInputs() 865 const ArgDescriptor *IncomingArgZ = std::get<0>(WorkitemIDZ); in passSpecialInputs() 918 ArgDescriptor IncomingArg = ArgDescriptor::createArg( in passSpecialInputs()
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| H A D | AMDGPUISelLowering.h | 25 struct ArgDescriptor; 319 const ArgDescriptor &Arg) const;
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| H A D | AMDGPUTargetMachine.cpp | 1540 ArgDescriptor &Arg, unsigned UserSGPRs, in parseMachineFunctionInfo() 1554 Arg = ArgDescriptor::createRegister(Reg); in parseMachineFunctionInfo() 1556 Arg = ArgDescriptor::createStack(A->StackOffset); in parseMachineFunctionInfo() 1559 Arg = ArgDescriptor::createArg(Arg, *A->Mask); in parseMachineFunctionInfo()
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| H A D | AMDGPULegalizerInfo.h | 101 const ArgDescriptor *Arg,
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| H A D | SIISelLowering.cpp | 1642 const ArgDescriptor *InputPtrReg; in lowerKernArgParameterPtr() 1807 const ArgDescriptor *Reg; in getPreloadedValue() 1928 ArgDescriptor Arg = ArgDescriptor()) { in allocateVGPR32Input() 1930 return ArgDescriptor::createArg(Arg, Mask); in allocateVGPR32Input() 1949 return ArgDescriptor::createRegister(Reg, Mask); in allocateVGPR32Input() 1966 return ArgDescriptor::createRegister(Reg); in allocateSGPR32InputImpl() 2003 ArgDescriptor Arg; in allocateSpecialInputVGPRs() 2794 const ArgDescriptor *OutgoingArg; in passSpecialInputs() 2809 const ArgDescriptor *IncomingArg; in passSpecialInputs() 2854 const ArgDescriptor *OutgoingArg; in passSpecialInputs() [all …]
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| H A D | SIISelLowering.h | 84 const ArgDescriptor &ArgDesc) const;
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| H A D | AMDGPULegalizerInfo.cpp | 3270 const ArgDescriptor *Arg, in loadInputValue() 3306 const ArgDescriptor *Arg; in loadInputValue() 3355 const ArgDescriptor *Arg; in legalizeWorkitemIDIntrinsic()
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| H A D | AMDGPUISelLowering.cpp | 4226 const ArgDescriptor &Arg) const { in loadInputValue()
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