Lines Matching refs:ArgDescriptor

96         ArgDescriptor::createRegister(ScratchRSrcReg);  in SIMachineFunctionInfo()
179             ArgDescriptor::createRegister(AMDGPU::SGPR5);  in SIMachineFunctionInfo()
219     ArgDescriptor::createRegister(TRI.getMatchingSuperReg(  in addPrivateSegmentBuffer()
226   ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg(  in addDispatchPtr()
233   ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg(  in addQueuePtr()
241     = ArgDescriptor::createRegister(TRI.getMatchingSuperReg(  in addKernargSegmentPtr()
248   ArgInfo.DispatchID = ArgDescriptor::createRegister(TRI.getMatchingSuperReg(  in addDispatchID()
255   ArgInfo.FlatScratchInit = ArgDescriptor::createRegister(TRI.getMatchingSuperReg(  in addFlatScratchInit()
262   ArgInfo.ImplicitBufferPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg(  in addImplicitBufferPtr()
269   ArgInfo.LDSKernelId = ArgDescriptor::createRegister(getNextUserSGPR());  in addLDSKernelId()
548                         const ArgDescriptor &Arg) {  in convertArgumentInfo()