Searched refs:AndInst (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 129 bool tryOptAndIntoCompareBranch(MachineInstr &AndInst, bool Invert,
1525 MachineInstr &AndInst, bool Invert, MachineBasicBlock *DstMBB, in tryOptAndIntoCompareBranch() argument
1527 assert(AndInst.getOpcode() == TargetOpcode::G_AND && "Expected G_AND only?"); in tryOptAndIntoCompareBranch()
1550 AndInst.getOperand(2).getReg(), *MIB.getMRI()); in tryOptAndIntoCompareBranch()
1558 Register TestReg = AndInst.getOperand(1).getReg(); in tryOptAndIntoCompareBranch()
1626 MachineInstr *AndInst = getOpcodeDef(TargetOpcode::G_AND, LHS, MRI); in tryOptCompareBranchFedByICmp() local
1633 if (VRegAndVal && !AndInst) { in tryOptCompareBranchFedByICmp()
1661 AndInst = getOpcodeDef(TargetOpcode::G_AND, LHS, MRI); in tryOptCompareBranchFedByICmp()
1671 if (AndInst && in tryOptCompareBranchFedByICmp()
1673 *AndInst, /*Invert = */ Pred == CmpInst::ICMP_NE, DestMBB, MIB)) { in tryOptCompareBranchFedByICmp()
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 828 MachineInstr &AndInst = in selectZext() local
833 constrainSelectedInstRegOperands(AndInst, TII, TRI, RBI); in selectZext()
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 4230 const auto *AndInst = dyn_cast<const Instruction>(*ExtInst->user_begin()); in canGetThrough() local
4231 if (AndInst && AndInst->getOpcode() == Instruction::And) { in canGetThrough()
4232 const auto *Cst = dyn_cast<ConstantInt>(AndInst->getOperand(1)); in canGetThrough()
|