| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | DetectDeadLanes.cpp | 529 bool Again = false; in runOnce() local
560 Again = true; in runOnce()
567 return std::make_pair(Changed, Again); in runOnce()
590 bool Again; in runOnMachineFunction() local
593 std::tie(LocalChanged, Again) = runOnce(MF); in runOnMachineFunction()
595 } while(Again); in runOnMachineFunction()
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| H A D | RegisterScavenging.cpp | 773 bool Again = scavengeFrameVirtualRegsInBlock(MRI, RS, MBB); in scavengeFrameVirtualRegs() local
774 if (Again) { in scavengeFrameVirtualRegs()
777 Again = scavengeFrameVirtualRegsInBlock(MRI, RS, MBB); in scavengeFrameVirtualRegs()
780 if (Again) in scavengeFrameVirtualRegs()
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| H A D | RegisterCoalescer.cpp | 250 bool joinCopy(MachineInstr *CopyMI, bool &Again);
1897 bool RegisterCoalescer::joinCopy(MachineInstr *CopyMI, bool &Again) { in joinCopy() argument
1898 Again = false; in joinCopy()
2003 Again = true; // May be possible to coalesce later. in joinCopy()
2070 Again = true; // May be possible to coalesce later. in joinCopy()
3920 bool Again = false; in copyCoalesceWorkList() local
3921 bool Success = joinCopy(MI, Again); in copyCoalesceWorkList()
3923 if (Success || !Again) in copyCoalesceWorkList()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenPredicate.cpp | 511 bool Again; in runOnMachineFunction() local
513 Again = false; in runOnMachineFunction()
521 Again = true; in runOnMachineFunction()
524 Changed |= Again; in runOnMachineFunction()
530 } while (Again); in runOnMachineFunction()
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| /llvm-project-15.0.7/lld/test/COFF/ |
| H A D | gc-dwarf.s | 55 # Similarly, .eh_frame unwind info should not keep functions alive. Again, this
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | fp16-no-condition.ll | 75 ; Again, do the corresponding test with 32-bit floats and check that
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| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | shift-03.ll | 92 ; Check the next value up. Again, we could mask the amount instead.
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| H A D | shift-02.ll | 92 ; Check the next value up. Again, we could mask the amount instead.
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| H A D | shift-01.ll | 92 ; Check the next value up. Again, we could mask the amount instead.
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| H A D | shift-05.ll | 117 ; Again, we could mask the shift amount instead.
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| H A D | shift-07.ll | 117 ; Again, we could mask the shift amount instead.
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| H A D | shift-06.ll | 117 ; Again, we could mask the shift amount instead.
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| H A D | shift-08.ll | 147 ; Again, we could mask the shift amount instead.
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| H A D | shift-04.ll | 146 ; Again, we could mask the shift amount instead.
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| /llvm-project-15.0.7/llvm/docs/HistoricalNotes/ |
| H A D | 2001-06-01-GCCOptimizations2.txt | 36 > feasible and should be fun. (Again, link time cost is the issue.)
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| H A D | 2001-02-06-TypeNotationDebateResp1.txt | 31 Again, I don't disagree with this at all. But to some extent this
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| H A D | 2001-02-06-TypeNotationDebateResp4.txt | 24 > Again, I don't disagree with this at all. But to some extent this
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | setjmp-spills.ll | 39 ; Again, keep enough variables live that they need spill slots. Since
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| H A D | combine-multiplies.ll | 95 ; Again, we want to make sure we don't generate two different multiplies.
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| /llvm-project-15.0.7/llvm/test/DebugInfo/X86/ |
| H A D | instr-ref-track-clobbers.mir | 20 ## Again, the DBG_VALUE can come either after the copy to $rax or the kill of
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 969 bool Again = Lexer.is(AsmToken::Identifier); in tryParseRegister() local
971 while (Again) { in tryParseRegister()
986 Again = (Contigious && Type) || (Workaround && Type); in tryParseRegister()
987 NeededWorkaround = NeededWorkaround || (Again && !(Contigious && Type)); in tryParseRegister()
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| /llvm-project-15.0.7/llvm/test/Analysis/BasicAA/ |
| H A D | featuretest.ll | 60 ; interfere with each other. Again, important for scientific codes.
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| /llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/bugprone/ |
| H A D | use-after-move.rst | 170 particular case, it does not. Again, this is intentional.
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | addsub-shifted.ll | 279 ; Again, it's important that cmn isn't used here in case %rhs64 == 0.
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| /llvm-project-15.0.7/llvm/test/Transforms/InstCombine/ |
| H A D | aggregate-reconstruction.ll | 281 ; Again, we should first try to perform local reasoning, without looking to predecessors.
|