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Searched refs:AddrSegmentReg (Results 1 – 17 of 17) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InsertPrefetch.cpp220 X86::AddrSegmentReg == 4, in runOnMachineFunction()
233 .addReg(Current->getOperand(MemOpOffset + X86::AddrSegmentReg) in runOnMachineFunction()
H A DX86AsmPrinter.cpp373 const MachineOperand &Segment = MI->getOperand(OpNo + X86::AddrSegmentReg); in PrintMemReference()
375 PrintModifiedOperand(MI, OpNo + X86::AddrSegmentReg, O, Modifier); in PrintMemReference()
389 const MachineOperand &SegReg = MI->getOperand(OpNo + X86::AddrSegmentReg); in PrintIntelMemReference()
405 PrintOperand(MI, OpNo + X86::AddrSegmentReg, O); in PrintIntelMemReference()
H A DX86InstrInfo.h121 return Op + X86::AddrSegmentReg <= MI.getNumOperands() && in isLeaMem()
135 MI.getOperand(Op + X86::AddrSegmentReg).isReg() && isLeaMem(MI, Op); in isMem()
H A DX86OptimizeLEAs.cpp197 &MI.getOperand(N + X86::AddrSegmentReg), in getMemOpKey()
565 MI.getOperand(MemOpNo + X86::AddrSegmentReg) in removeRedundantAddrCalc()
H A DX86FixupLEAs.cpp565 const MachineOperand &Segment = MI.getOperand(1 + X86::AddrSegmentReg); in optTwoAddrLEA()
705 const MachineOperand &Segment = MI.getOperand(1 + X86::AddrSegmentReg); in processInstructionForSlowLEA()
757 const MachineOperand &Segment = MI.getOperand(1 + X86::AddrSegmentReg); in processInstrForSlow3OpLEA()
H A DX86CallFrameOptimization.cpp432 (I->getOperand(X86::AddrSegmentReg).getReg() != X86::NoRegister) || in collectCallInfo()
H A DX86AvoidStoreForwardingBlocks.cpp318 const MachineOperand &Segment = MI->getOperand(AddrOffset + X86::AddrSegmentReg); in isRelevantAddressingMode()
H A DX86MCInstLower.cpp392 Inst.getOperand(AddrBase + X86::AddrSegmentReg).isReg() && in SimplifyShortMoveForm()
420 MCOperand Seg = Inst.getOperand(AddrBase + X86::AddrSegmentReg); in SimplifyShortMoveForm()
515 assert(OutMI.getOperand(1 + X86::AddrSegmentReg).getReg() == 0 && in Lower()
H A DX86InstrInfo.cpp2646 const MachineOperand &Segment = MI->getOperand(1 + X86::AddrSegmentReg); in isConvertibleLEA()
7319 !HasSameOp(X86::AddrIndexReg) || !HasSameOp(X86::AddrSegmentReg)) in areLoadsFromSameBasePtr()
/llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/
H A DX86IntelInstPrinter.cpp389 printOptionalSegReg(MI, Op + X86::AddrSegmentReg, O); in printMemReference()
H A DX86ATTInstPrinter.cpp433 printOptionalSegReg(MI, Op + X86::AddrSegmentReg, O); in printMemReference()
H A DX86MCTargetDesc.cpp648 const MCOperand &SegReg = Inst.getOperand(MemOpStart + X86::AddrSegmentReg); in evaluateMemoryOperandAddress()
674 const MCOperand &SegReg = Inst.getOperand(MemOpStart + X86::AddrSegmentReg); in getMemoryOperandRelocationOffset()
H A DX86BaseInfo.h38 AddrSegmentReg = 4, enumerator
H A DX86AsmBackend.cpp309 SegmentReg = Inst.getOperand(MemoryOperand + X86::AddrSegmentReg).getReg(); in determinePaddingPrefix()
H A DX86MCCodeEmitter.cpp605 emitSegmentOverridePrefix(MemoryOperand + X86::AddrSegmentReg, MI, OS); in emitPrefixImpl()
/llvm-project-15.0.7/bolt/lib/Target/X86/
H A DX86MCPlusBuilder.cpp687 if (MemOpOffset + X86::AddrSegmentReg >= MCPlus::getNumPrimeOperands(Inst)) in evaluateX86MemoryOperand()
695 Inst.getOperand(MemOpOffset + X86::AddrSegmentReg); in evaluateX86MemoryOperand()
1153 Inst.getOperand(MemOpOffset + X86::AddrSegmentReg + 1); in isStackAccess()
1225 Inst.getOperand(MemOpOffset + X86::AddrSegmentReg + 1); in changeToPushOrPop()
2447 const MCExpr *OffsetExpr, const MCPhysReg &AddrSegmentReg, in createLoad() argument
2467 Inst.addOperand(MCOperand::createReg(AddrSegmentReg)); // AddrSegmentReg in createLoad()
/llvm-project-15.0.7/bolt/include/bolt/Core/
H A DMCPlusBuilder.h1507 const MCPhysReg &AddrSegmentReg, in createLoad() argument