Searched refs:AddrNumOperands (Results 1 – 14 of 14) sorted by relevance
278 MachineOperand &StackAdjust = MBBI->getOperand(isMem ? X86::AddrNumOperands in ExpandMI()344 for (unsigned i = 0; i != X86::AddrNumOperands; ++i) in ExpandMI()471 for (int i = 0; i < X86::AddrNumOperands; ++i) { in ExpandMI()495 Register Reg = MBBI->getOperand(X86::AddrNumOperands).getReg(); in ExpandMI()496 bool SrcIsKill = MBBI->getOperand(X86::AddrNumOperands).isKill(); in ExpandMI()503 for (int i = 0; i < X86::AddrNumOperands; ++i) { in ExpandMI()667 for (int i = 0; i < X86::AddrNumOperands; ++i) { in ExpandVastartSaveXmmRegs()
291 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction()297 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction()509 const MachineOperand &PushOp = Store->getOperand(X86::AddrNumOperands); in adjustCallSequence()564 for (unsigned i = NumOps - X86::AddrNumOperands; i != NumOps; ++i) in adjustCallSequence()
513 assert(OutMI.getNumOperands() == 1 + X86::AddrNumOperands && in Lower()822 assert(OutMI.getNumOperands() == X86::AddrNumOperands && in Lower()2071 assert(MI->getNumOperands() >= (SrcIdx + 1 + X86::AddrNumOperands) && in addConstantComments()2149 assert(MI->getNumOperands() >= (SrcIdx + 1 + X86::AddrNumOperands) && in addConstantComments()2167 assert(MI->getNumOperands() >= (3 + X86::AddrNumOperands + 1) && in addConstantComments()2193 assert(MI->getNumOperands() >= (3 + X86::AddrNumOperands) && in addConstantComments()2208 assert(MI->getNumOperands() == (1 + X86::AddrNumOperands) && in addConstantComments()2268 assert(MI->getNumOperands() >= (1 + X86::AddrNumOperands) && in addConstantComments()2360 assert(MI->getNumOperands() >= (1 + X86::AddrNumOperands) && in addConstantComments()
535 MemOpEnd = MemOpStart + X86::AddrNumOperands; in usedAsAddr()570 OpIdx += (X86::AddrNumOperands - 1); in buildClosure()
425 MachineOperand &StoreSrcVReg = StoreInst->getOperand(X86::AddrNumOperands); in buildCopy()427 NewStore->getOperand(X86::AddrNumOperands).setIsKill(StoreSrcVReg.isKill()); in buildCopy()
134 return Op + X86::AddrNumOperands <= MI.getNumOperands() && in isMem()
703 if (MI.getOperand(X86::AddrNumOperands).getSubReg() == 0 && in isStoreToStackSlot()705 return MI.getOperand(X86::AddrNumOperands).getReg(); in isStoreToStackSlot()722 return MI.getOperand(X86::AddrNumOperands).getReg(); in isStoreToStackSlotPostFE()4845 Register SrcReg = MIB.getReg(X86::AddrNumOperands); in expandNOVLXStore()4855 MIB->getOperand(X86::AddrNumOperands).setReg(SrcReg); in expandNOVLXStore()6077 if (MOs.size() == X86::AddrNumOperands && in foldMemoryOperandImpl()6660 SmallVector<MachineOperand,X86::AddrNumOperands> MOs; in foldMemoryOperandImpl()6748 MOs.append(LoadMI.operands_begin() + NumOps - X86::AddrNumOperands, in foldMemoryOperandImpl()6873 SmallVector<MachineOperand, X86::AddrNumOperands> AddrOps; in unfoldMemoryOperand()6879 if (i >= Index && i < Index + X86::AddrNumOperands) in unfoldMemoryOperand()[all …]
980 for (int i = 0; i < X86::AddrNumOperands; ++i) in rewriteSetCC()
1181 assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) && in handleOneArgFP()
35533 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitSetJmpShadowStackFix()35641 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjSetJmp()35799 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitLongJmpShadowStackFix()35925 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()35937 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()35951 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()36403 .addReg(MI.getOperand(X86::AddrNumOperands).getReg()); in EmitInstrWithCustomInserter()36513 for (unsigned Idx = 0; Idx < X86::AddrNumOperands; ++Idx) in EmitInstrWithCustomInserter()36515 MIB.add(MI.getOperand(X86::AddrNumOperands)); in EmitInstrWithCustomInserter()36520 .add(MI.getOperand(X86::AddrNumOperands)); in EmitInstrWithCustomInserter()[all …]
823 CurOp += X86::AddrNumOperands; in emitVEXOpcodePrefix()884 VEX_4V = ~getX86RegEncoding(MI, CurOp + X86::AddrNumOperands) & 0xf; in emitVEXOpcodePrefix()1176 CurOp += X86::AddrNumOperands; in emitREXPrefix()1185 CurOp += X86::AddrNumOperands; in emitREXPrefix()1435 unsigned SrcRegNum = CurOp + X86::AddrNumOperands; in encodeInstruction()1521 CurOp = FirstMemOp + X86::AddrNumOperands; in encodeInstruction()1533 CurOp = FirstMemOp + X86::AddrNumOperands; in encodeInstruction()1550 CurOp = FirstMemOp + X86::AddrNumOperands; in encodeInstruction()1556 CurOp = FirstMemOp + X86::AddrNumOperands; in encodeInstruction()1599 CurOp = FirstMemOp + X86::AddrNumOperands; in encodeInstruction()[all …]
41 AddrNumOperands = 5 enumerator
3777 if (!Inst.getOperand(X86::AddrNumOperands).isImm() || in processInstruction()3778 Inst.getOperand(X86::AddrNumOperands).getImm() != 1) in processInstruction()3816 for (int i = 0; i != X86::AddrNumOperands; ++i) in processInstruction()3858 X86::AddrNumOperands - 1).getReg(); in validateInstruction()
1616 TargetOpNum = getMemoryOperandNo(Inst) + X86::AddrNumOperands; in replaceMemOperandWithImm()