Home
last modified time | relevance | path

Searched refs:AddrMode (Results 1 – 25 of 64) sorted by relevance

123

/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DThumb2InstrInfo.cpp616 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) in rewriteT2FrameIndex()
622 if (AddrMode == ARMII::AddrModeT2_so) { in rewriteT2FrameIndex()
632 AddrMode = ARMII::AddrModeT2_i12; in rewriteT2FrameIndex()
637 if (AddrMode == ARMII::AddrModeT2_i8neg || in rewriteT2FrameIndex()
638 AddrMode == ARMII::AddrModeT2_i12) { in rewriteT2FrameIndex()
652 } else if (AddrMode == ARMII::AddrMode5) { in rewriteT2FrameIndex()
666 } else if (AddrMode == ARMII::AddrMode5FP16) { in rewriteT2FrameIndex()
682 AddrMode == ARMII::AddrModeT2_i7) { in rewriteT2FrameIndex()
685 switch (AddrMode) { in rewriteT2FrameIndex()
733 if (AddrMode == ARMII::AddrMode5 || AddrMode == ARMII::AddrMode5FP16) in rewriteT2FrameIndex()
[all …]
H A DARMInstrFormats.td90 class AddrMode<bits<5> val> {
93 def AddrModeNone : AddrMode<0>;
94 def AddrMode1 : AddrMode<1>;
95 def AddrMode2 : AddrMode<2>;
96 def AddrMode3 : AddrMode<3>;
97 def AddrMode4 : AddrMode<4>;
98 def AddrMode5 : AddrMode<5>;
99 def AddrMode6 : AddrMode<6>;
100 def AddrModeT1_1 : AddrMode<7>;
101 def AddrModeT1_2 : AddrMode<8>;
[all …]
H A DARMBaseRegisterInfo.cpp533 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in getFrameIndexInstrOffset() local
537 switch (AddrMode) { in getFrameIndexInstrOffset()
725 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isFrameOffsetLegal() local
731 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) in isFrameOffsetLegal()
737 switch (AddrMode) { in isFrameOffsetLegal()
H A DARMHazardRecognizer.cpp113 unsigned AddrMode = (TSFlags & ARMII::AddrModeMask); in getBaseOffset() local
120 switch (AddrMode) { in getBaseOffset()
H A DARMBaseInstrInfo.cpp204 unsigned AddrMode = (TSFlags & ARMII::AddrModeMask); in convertToThreeAddress() local
216 switch (AddrMode) { in convertToThreeAddress()
2650 AddrMode = ARMII::AddrMode2; in rewriteARMFrameIndex()
2693 switch (AddrMode) { in rewriteARMFrameIndex()
2739 Scale = (AddrMode == ARMII::AddrModeT2_i7s2 ? 2 : in rewriteARMFrameIndex()
2766 if (AddrMode == ARMII::AddrMode_i12) in rewriteARMFrameIndex()
2779 if (AddrMode == ARMII::AddrMode_i12) in rewriteARMFrameIndex()
4876 ARMII::AddrMode AddrMode = in verifyInstruction() local
4878 switch (AddrMode) { in verifyInstruction()
6092 AddrMode == ARMII::AddrModeNone || in checkAndUpdateStackOffset()
[all …]
H A DARMISelLowering.h469 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
478 const AddrMode &AM, Type *Ty,
481 bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
485 bool isLegalT1ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
H A DARMInstrNEON.td601 (ins AddrMode:$Rn), IIC_VLD1,
609 (ins AddrMode:$Rn), IIC_VLD1x2,
801 (ins AddrMode:$Rn), itin,
830 (ins AddrMode:$Rn), itin,
1371 Operand AddrMode>
1373 (ins AddrMode:$Rn),
1395 Operand AddrMode>
1397 (ins AddrMode:$Rn), IIC_VLD1dup,
1470 (ins AddrMode:$Rn), IIC_VLD2dup,
1503 Operand AddrMode> {
[all …]
H A DThumbRegisterInfo.cpp371 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteFrameIndex() local
382 if (AddrMode != ARMII::AddrModeT1_s) in rewriteFrameIndex()
/llvm-project-15.0.7/llvm/lib/Target/MSP430/Disassembler/
H A DMSP430Disassembler.cpp142 enum AddrMode { enum
154 static AddrMode DecodeSrcAddrMode(unsigned Rs, unsigned As) { in DecodeSrcAddrMode()
181 static AddrMode DecodeSrcAddrModeI(unsigned Insn) { in DecodeSrcAddrModeI()
187 static AddrMode DecodeSrcAddrModeII(unsigned Insn) { in DecodeSrcAddrModeII()
193 static AddrMode DecodeDstAddrMode(unsigned Insn) { in DecodeDstAddrMode()
205 static const uint8_t *getDecoderTable(AddrMode SrcAM, unsigned Words) { in getDecoderTable()
234 AddrMode SrcAM = DecodeSrcAddrModeI(Insn); in getInstructionI()
235 AddrMode DstAM = DecodeDstAddrMode(Insn); in getInstructionI()
289 AddrMode SrcAM = DecodeSrcAddrModeII(Insn); in getInstructionII()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp3141 ExtAddrMode &AddrMode; member in __anon78e22a880c11::AddressingModeMatcher
3882 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg) in matchScaledValue()
4836 AddrMode.Scale = 1; in matchAddr()
4840 AddrMode.Scale = 0; in matchAddr()
5258 if (AddrMode.BaseReg && AddrMode.BaseReg->getType()->isPointerTy()) { in optimizeMemoryInst()
5263 if (AddrMode.Scale && AddrMode.ScaledReg->getType()->isPointerTy()) { in optimizeMemoryInst()
5270 AddrMode.Scale = 0; in optimizeMemoryInst()
5310 !AddrMode.BaseReg && !AddrMode.Scale && !AddrMode.BaseOffs) { in optimizeMemoryInst()
5396 Type *BaseTy = AddrMode.BaseReg ? AddrMode.BaseReg->getType() : nullptr; in optimizeMemoryInst()
5397 Type *ScaleTy = AddrMode.Scale ? AddrMode.ScaledReg->getType() : nullptr; in optimizeMemoryInst()
[all …]
H A DImplicitNullChecks.cpp379 auto AddrMode = *AM; in isSuitableMemoryOp() local
380 const Register BaseReg = AddrMode.BaseReg, ScaledReg = AddrMode.ScaledReg; in isSuitableMemoryOp()
381 int64_t Displacement = AddrMode.Displacement; in isSuitableMemoryOp()
453 if (CalculateDisplacementFromAddrMode(ScaledReg, AddrMode.Scale)) in isSuitableMemoryOp()
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats.td9 class AddrMode<bits<5> val> {
13 def AddrModeNone : AddrMode<0>;
14 def AddrMode32B : AddrMode<1>; // ld32.b, ld32.bs, st32.b, st32.bs, +4kb
17 def AddrMode16B : AddrMode<4>; // ld16.b, +32b
18 def AddrMode16H : AddrMode<5>; // ld16.h, +64b
19 def AddrMode16W : AddrMode<6>; // ld16.w, +128b or +1kb
20 def AddrMode32SDF : AddrMode<7>; // flds, fldd, +1kb
22 class CSKYInst<AddrMode am, int sz, dag outs, dag ins, string asmstr,
26 AddrMode AM = am;
238 class I_LD<AddrMode am, bits<4> sop, string op, Operand operand>
[all …]
H A DCSKYRegisterInfo.cpp111 unsigned AddrMode = (Desc.TSFlags & CSKYII::AddrModeMask); in IsLegalOffset() local
137 switch (AddrMode) { in IsLegalOffset()
H A DCSKYInstrFormats16Instr.td185 class I16_XZ_LDST<AddrMode am, bits<3> sop, string opstr, dag outs, dag ins>
198 class I16_ZSP_LDST<AddrMode am, bits<3> sop, string opstr, dag outs, dag ins> : CSKY16Inst<
/llvm-project-15.0.7/lldb/source/Plugins/Instruction/ARM64/
H A DEmulateInstructionARM64.h74 enum AddrMode { AddrMode_OFF, AddrMode_PRE, AddrMode_POST }; enum
176 template <AddrMode a_mode> bool EmulateLDPSTP(const uint32_t opcode);
178 template <AddrMode a_mode> bool EmulateLDRSTRImm(const uint32_t opcode);
/llvm-project-15.0.7/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYBaseInfo.h28 enum AddrMode { enum
/llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMBaseInfo.h185 enum AddrMode { enum
212 inline static const char *AddrModeToString(AddrMode addrmode) { in AddrModeToString()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h731 enum AddrMode { enum
1000 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
1146 PPC::AddrMode SelectOptimalAddrMode(const SDNode *Parent, SDValue N,
1152 PPC::AddrMode SelectForceXFormMode(SDValue N, SDValue &Disp, SDValue &Base,
1205 std::map<PPC::AddrMode, SmallVector<unsigned, 16>> AddrModesMap;
1463 PPC::AddrMode getAddrModeForFlags(unsigned Flags) const;
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonBaseInfo.h30 enum AddrMode { enum
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.h214 bool isLegalFlatAddressingMode(const AddrMode &AM) const;
215 bool isLegalMUBUFAddressingMode(const AddrMode &AM) const;
281 bool isLegalGlobalAddressingMode(const AddrMode &AM) const;
282 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCISelLowering.h73 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFISelLowering.h133 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRISelLowering.h102 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.h70 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h123 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,

123