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Searched refs:AddRegFrm (Results 1 – 10 of 10) sorted by relevance

/llvm-project-15.0.7/llvm/test/TableGen/
H A DTargetInstrInfo.td49 def AddRegFrm : Format<2>; def MRMDestReg : Format<3>;
93 "mov $dst, $src", 0xB0, AddRegFrm,
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DX86RecognizableInstr.h100 AddRegFrm = 2, enumerator
H A DX86RecognizableInstr.cpp512 case X86Local::AddRegFrm: in emitInstructionSpecifier()
790 case X86Local::AddRegFrm: in emitDecodePath()
859 if (Form == X86Local::AddRegFrm || Form == X86Local::MRMSrcRegCC || in emitDecodePath()
862 uint8_t Count = Form == X86Local::AddRegFrm ? 8 : 16; in emitDecodePath()
/llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/
H A DX86BaseInfo.h595 AddRegFrm = 2, enumerator
1103 case X86II::AddRegFrm: in getMemoryOperandNo()
H A DX86MCCodeEmitter.cpp1163 case X86II::AddRegFrm: in emitREXPrefix()
1413 case X86II::AddRegFrm: in encodeInstruction()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrInfo.td1318 def POP16r : I<0x58, AddRegFrm, (outs GR16:$reg), (ins), "pop{w}\t$reg", []>,
1476 def BSWAP16r_BAD : I<0xC8, AddRegFrm, (outs GR16:$dst), (ins GR16:$src),
1479 def BSWAP32r : I<0xC8, AddRegFrm, (outs GR32:$dst), (ins GR32:$src),
1484 def BSWAP64r : RI<0xC8, AddRegFrm, (outs GR64:$dst), (ins GR64:$src),
1612 def MOV8ri : Ii8 <0xB0, AddRegFrm, (outs GR8 :$dst), (ins i8imm :$src),
1615 def MOV16ri : Ii16<0xB8, AddRegFrm, (outs GR16:$dst), (ins i16imm:$src),
1618 def MOV32ri : Ii32<0xB8, AddRegFrm, (outs GR32:$dst), (ins i32imm:$src),
1626 def MOV64ri : RIi64<0xB8, AddRegFrm, (outs GR64:$dst), (ins i64imm:$src),
2146 def XCHG16ar : I<0x90, AddRegFrm, (outs GR16:$dst), (ins GR16:$src),
2149 def XCHG32ar : I<0x90, AddRegFrm, (outs GR32:$dst), (ins GR32:$src),
[all …]
H A DX86InstrArithmetic.td459 def INC16r_alt : I<0x40, AddRegFrm, (outs GR16:$dst), (ins GR16:$src1),
462 def INC32r_alt : I<0x40, AddRegFrm, (outs GR32:$dst), (ins GR32:$src1),
506 def DEC16r_alt : I<0x48, AddRegFrm, (outs GR16:$dst), (ins GR16:$src1),
509 def DEC32r_alt : I<0x48, AddRegFrm, (outs GR32:$dst), (ins GR32:$src1),
H A DX86InstrFormats.td22 def AddRegFrm : Format<2>;
/llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/X86/
H A DTarget.cpp160 case X86II::AddRegFrm: in isInvalidMemoryInstr()
/llvm-project-15.0.7/llvm/docs/
H A DWritingAnLLVMBackend.rst1855 case X86II::AddRegFrm: // for instructions that have one register operand
1890 for the ``X86II::AddRegFrm`` case, the first data emitted (by ``emitByte``) is
1901 case X86II::AddRegFrm: