Searched refs:AccessStage (Results 1 – 1 of 1) sorted by relevance
412 unsigned AccessStage = (LoopValStage != -1) ? LoopValStage : StageScheduled; in generateExistingPhis() local419 if (!InKernel && StageScheduled >= LoopValStage && AccessStage == 0 && in generateExistingPhis()433 else if (PrologStage >= AccessStage + StageDiff + np && in generateExistingPhis()438 else if (PrologStage >= AccessStage + StageDiff + np) { in generateExistingPhis()